From c89b795db45b2adc7f32d6a37b1cc4ebf6b8a6af Mon Sep 17 00:00:00 2001 From: Jason Ekstrand Date: Thu, 25 May 2017 11:47:13 -0700 Subject: [PATCH] i965: Combine render target resolve code We have two different bits of resolve code for render targets: one in brw_draw where it's always been and one in brw_context to deal with sRGB on gen9. Let's pull them together. Reviewed-by: Topi Pohjolainen Reviewed-by: Chad Versace --- src/mesa/drivers/dri/i965/brw_context.c | 47 ++++++++++++++++++++------------- src/mesa/drivers/dri/i965/brw_draw.c | 34 ------------------------ 2 files changed, 29 insertions(+), 52 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c index fe9124c..bf7200b 100644 --- a/src/mesa/drivers/dri/i965/brw_context.c +++ b/src/mesa/drivers/dri/i965/brw_context.c @@ -329,27 +329,24 @@ intel_update_state(struct gl_context * ctx, GLuint new_state) } } - /* If FRAMEBUFFER_SRGB is used on Gen9+ then we need to resolve any of the - * single-sampled color renderbuffers because the CCS buffer isn't - * supported for SRGB formats. This only matters if FRAMEBUFFER_SRGB is - * enabled because otherwise the surface state will be programmed with the - * linear equivalent format anyway. - */ - if (brw->gen >= 9 && ctx->Color.sRGBEnabled) { - struct gl_framebuffer *fb = ctx->DrawBuffer; - for (int i = 0; i < fb->_NumColorDrawBuffers; i++) { - struct gl_renderbuffer *rb = fb->_ColorDrawBuffers[i]; + struct gl_framebuffer *fb = ctx->DrawBuffer; + for (int i = 0; i < fb->_NumColorDrawBuffers; i++) { + struct intel_renderbuffer *irb = + intel_renderbuffer(fb->_ColorDrawBuffers[i]); - if (rb == NULL) - continue; + if (irb == NULL || irb->mt == NULL) + continue; - struct intel_renderbuffer *irb = intel_renderbuffer(rb); - struct intel_mipmap_tree *mt = irb->mt; + struct intel_mipmap_tree *mt = irb->mt; - if (mt == NULL || - mt->num_samples > 1 || - _mesa_get_srgb_format_linear(mt->format) == mt->format) - continue; + /* If FRAMEBUFFER_SRGB is used on Gen9+ then we need to resolve any of + * the single-sampled color renderbuffers because the CCS buffer isn't + * supported for SRGB formats. This only matters if FRAMEBUFFER_SRGB is + * enabled because otherwise the surface state will be programmed with + * the linear equivalent format anyway. + */ + if (brw->gen >= 9 && ctx->Color.sRGBEnabled && mt->num_samples <= 1 && + _mesa_get_srgb_format_linear(mt->format) != mt->format) { /* Lossless compression is not supported for SRGB formats, it * should be impossible to get here with such surfaces. @@ -358,6 +355,20 @@ intel_update_state(struct gl_context * ctx, GLuint new_state) intel_miptree_all_slices_resolve_color(brw, mt, 0); brw_render_cache_set_check_flush(brw, mt->bo); } + + /* For layered rendering non-compressed fast cleared buffers need to be + * resolved. Surface state can carry only one fast color clear value + * while each layer may have its own fast clear color value. For + * compressed buffers color value is available in the color buffer. + */ + if (irb->layer_count > 1 && + !(irb->mt->aux_disable & INTEL_AUX_DISABLE_CCS) && + !intel_miptree_is_lossless_compressed(brw, mt)) { + assert(brw->gen >= 8); + + intel_miptree_resolve_color(brw, mt, irb->mt_level, 1, + irb->mt_layer, irb->layer_count, 0); + } } _mesa_lock_context_textures(ctx); diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c index f728731..3a1bb50 100644 --- a/src/mesa/drivers/dri/i965/brw_draw.c +++ b/src/mesa/drivers/dri/i965/brw_draw.c @@ -405,39 +405,6 @@ brw_postdraw_set_buffers_need_resolve(struct brw_context *brw) } } -static void -brw_predraw_set_aux_buffers(struct brw_context *brw) -{ - if (brw->gen < 9) - return; - - struct gl_context *ctx = &brw->ctx; - struct gl_framebuffer *fb = ctx->DrawBuffer; - - for (unsigned i = 0; i < fb->_NumColorDrawBuffers; i++) { - struct intel_renderbuffer *irb = - intel_renderbuffer(fb->_ColorDrawBuffers[i]); - - if (!irb) { - continue; - } - - /* For layered rendering non-compressed fast cleared buffers need to be - * resolved. Surface state can carry only one fast color clear value - * while each layer may have its own fast clear color value. For - * compressed buffers color value is available in the color buffer. - */ - if (irb->layer_count > 1 && - !(irb->mt->aux_disable & INTEL_AUX_DISABLE_CCS) && - !intel_miptree_is_lossless_compressed(brw, irb->mt)) { - assert(brw->gen >= 8); - - intel_miptree_resolve_color(brw, irb->mt, irb->mt_level, 1, - irb->mt_layer, irb->layer_count, 0); - } - } -} - /* May fail if out of video memory for texture or vbo upload, or on * fallback conditions. */ @@ -486,7 +453,6 @@ brw_try_draw_prims(struct gl_context *ctx, util_last_bit(ctx->VertexProgram._Current->SamplersUsed); intel_prepare_render(brw); - brw_predraw_set_aux_buffers(brw); /* This workaround has to happen outside of brw_upload_render_state() * because it may flush the batchbuffer for a blit, affecting the state -- 2.7.4