From c87e16718fa7234dd01b37ea7a03b990a25b9b1c Mon Sep 17 00:00:00 2001 From: Zaara Syeda Date: Mon, 14 May 2018 15:26:44 +0000 Subject: [PATCH] [ELF][PPC64] Fix getRelExpr for R_PPC64_REL32 The relocation R_PPC64_REL32 should return R_PC for getRelExpr since it computes S + A - P. Differential Revision: https://reviews.llvm.org/D46586 llvm-svn: 332252 --- lld/ELF/Arch/PPC64.cpp | 1 + lld/test/ELF/ppc64-relocs.s | 39 ++++++++++++++++++++++++++++++++++++--- 2 files changed, 37 insertions(+), 3 deletions(-) diff --git a/lld/ELF/Arch/PPC64.cpp b/lld/ELF/Arch/PPC64.cpp index ec14a55..086123d 100644 --- a/lld/ELF/Arch/PPC64.cpp +++ b/lld/ELF/Arch/PPC64.cpp @@ -163,6 +163,7 @@ RelExpr PPC64::getRelExpr(RelType Type, const Symbol &S, return R_PPC_CALL_PLT; case R_PPC64_REL16_LO: case R_PPC64_REL16_HA: + case R_PPC64_REL32: return R_PC; default: return R_ABS; diff --git a/lld/test/ELF/ppc64-relocs.s b/lld/test/ELF/ppc64-relocs.s index 257f1c8..8ba0075 100644 --- a/lld/test/ELF/ppc64-relocs.s +++ b/lld/test/ELF/ppc64-relocs.s @@ -2,11 +2,13 @@ # RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %s -o %t # RUN: ld.lld %t -o %t2 -# RUN: llvm-objdump -d %t2 | FileCheck %s +# RUN: llvm-objdump -D %t2 | FileCheck %s --check-prefix=rodataLE +# RUN: llvm-objdump -D %t2 | FileCheck %s # RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %s -o %t # RUN: ld.lld %t -o %t2 -# RUN: llvm-objdump -d %t2 | FileCheck %s +# RUN: llvm-objdump -D %t2 | FileCheck %s --check-prefix=rodataBE +# RUN: llvm-objdump -D %t2 | FileCheck %s .text .global _start @@ -16,9 +18,16 @@ _start: li 3,42 sc -.section ".toc","aw" +.section .rodata,"a",@progbits + .p2align 2 +.LJTI0_0: + .long .LBB0_2-.LJTI0_0 + +.section .toc,"aw",@progbits .L1: .quad 22, 37, 89, 47 +.LC0: + .tc .LJTI0_0[TC],.LJTI0_0 .section .R_PPC64_TOC16_LO_DS,"ax",@progbits .globl .FR_PPC64_TOC16_LO_DS @@ -130,3 +139,27 @@ _start: # CHECK: .FR_PPC64_ADDR16_HIGHESTA: # CHECK: 10010038: {{.*}} li 1, 0 +.section .R_PPC64_REL32, "ax",@progbits +.globl .FR_PPC64_REL32 +.FR_PPC64_REL32: + addis 5, 2, .LC0@toc@ha + ld 5, .LC0@toc@l(5) +.LBB0_2: + add 3, 3, 4 + +# rodataLE: Disassembly of section .rodata: +# rodataLE: .rodata: +# rodataLE: 10000190: b4 fe 00 00 + +# rodataBE: Disassembly of section .rodata: +# rodataBE: .rodata: +# rodataBE: 10000190: 00 00 fe b4 + +# Address of rodata + value stored at rodata entry +# should equal address of LBB0_2. +# 0x10000190 + 0xfeb4 = 0x10010044 +# CHECK: Disassembly of section .R_PPC64_REL32: +# CHECK: .FR_PPC64_REL32: +# CHECK: 1001003c: {{.*}} addis 5, 2, -1 +# CHECK: 10010040: {{.*}} ld 5, -32736(5) +# CHECK: 10010044: {{.*}} add 3, 3, 4 -- 2.7.4