From c7bf20403bee51789f3691f0bf9bc7d7216f3f28 Mon Sep 17 00:00:00 2001
From: Alex Lorenz <arphaman@gmail.com>
Date: Fri, 24 Jul 2015 17:44:49 +0000
Subject: [PATCH] MIR Parser: Run the machine verifier after initializing
 machine functions.

llvm-svn: 243128
---
 llvm/lib/CodeGen/MIRParser/MIRParser.cpp           |  4 ++++
 llvm/test/CodeGen/MIR/X86/machine-instructions.mir |  8 ++++----
 llvm/test/CodeGen/MIR/X86/machine-verifier.mir     | 23 ++++++++++++++++++++++
 3 files changed, 31 insertions(+), 4 deletions(-)
 create mode 100644 llvm/test/CodeGen/MIR/X86/machine-verifier.mir

diff --git a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
index a7c81ab..383fde1 100644
--- a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
+++ b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
@@ -325,6 +325,10 @@ bool MIRParserImpl::initializeMachineFunction(MachineFunction &MF) {
                                     PFS))
       return true;
   }
+  // FIXME: This is a temporary workaround until the reserved registers can be
+  // serialized.
+  MF.getRegInfo().freezeReservedRegs(MF);
+  MF.verify();
   return false;
 }
 
diff --git a/llvm/test/CodeGen/MIR/X86/machine-instructions.mir b/llvm/test/CodeGen/MIR/X86/machine-instructions.mir
index 08f3d76..c319db0 100644
--- a/llvm/test/CodeGen/MIR/X86/machine-instructions.mir
+++ b/llvm/test/CodeGen/MIR/X86/machine-instructions.mir
@@ -18,8 +18,8 @@ body:
  - id:           0
    name:         entry
    instructions:
-     # CHECK:      - MOV32rr
-     # CHECK-NEXT: - RETQ
-     - MOV32rr
-     - ' RETQ '
+     # CHECK:      MOV32rr
+     # CHECK-NEXT: RETQ
+     - '%eax = MOV32rr %eax'
+     - ' RETQ %eax'
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/machine-verifier.mir b/llvm/test/CodeGen/MIR/X86/machine-verifier.mir
new file mode 100644
index 0000000..608a90e
--- /dev/null
+++ b/llvm/test/CodeGen/MIR/X86/machine-verifier.mir
@@ -0,0 +1,23 @@
+# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+# This test ensures that the MIR parser runs the machine verifier after parsing.
+
+--- |
+
+  define i32 @inc(i32 %a) {
+  entry:
+    ret i32 %a
+  }
+
+...
+---
+name:            inc
+body:
+ - id:           0
+   name:         entry
+   liveins:      [ '%edi' ]
+   instructions:
+   # CHECK: *** Bad machine code: Too few operands ***
+   # CHECK: instruction: COPY2 operands expected, but 0 given.
+     - 'COPY'
+     - 'RETQ'
+...
-- 
2.7.4