From c6a86569e841259d41db81d3d8f619f205be8217 Mon Sep 17 00:00:00 2001 From: Dafna Hirschfeld Date: Sat, 11 Apr 2020 18:06:00 +0200 Subject: [PATCH] media: staging: rkisp1: cap: support uv swap only for semiplanar formats The register RKISP1_CIF_MI_XTD_FORMAT_CTRL is relevant only for semiplanar formats, therefore the uv swap can be supported through this register only for semiplanar formats. Signed-off-by: Dafna Hirschfeld Reviewed-by: Laurent Pinchart Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/rkisp1/rkisp1-capture.c | 31 ++++++++++++++++----------- 1 file changed, 19 insertions(+), 12 deletions(-) diff --git a/drivers/staging/media/rkisp1/rkisp1-capture.c b/drivers/staging/media/rkisp1/rkisp1-capture.c index 7ffedf6..4c18b08 100644 --- a/drivers/staging/media/rkisp1/rkisp1-capture.c +++ b/drivers/staging/media/rkisp1/rkisp1-capture.c @@ -383,12 +383,16 @@ static void rkisp1_mp_config(struct rkisp1_capture *cap) cap->config->mi.cr_size_init); rkisp1_irq_frame_end_enable(cap); - reg = rkisp1_read(rkisp1, RKISP1_CIF_MI_XTD_FORMAT_CTRL); - if (cap->pix.cfg->uv_swap) - reg |= RKISP1_CIF_MI_XTD_FMT_CTRL_MP_CB_CR_SWAP; - else - reg &= ~RKISP1_CIF_MI_XTD_FMT_CTRL_MP_CB_CR_SWAP; - rkisp1_write(rkisp1, reg, RKISP1_CIF_MI_XTD_FORMAT_CTRL); + + /* set uv swapping for semiplanar formats */ + if (cap->pix.info->comp_planes == 2) { + reg = rkisp1_read(rkisp1, RKISP1_CIF_MI_XTD_FORMAT_CTRL); + if (cap->pix.cfg->uv_swap) + reg |= RKISP1_CIF_MI_XTD_FMT_CTRL_MP_CB_CR_SWAP; + else + reg &= ~RKISP1_CIF_MI_XTD_FMT_CTRL_MP_CB_CR_SWAP; + rkisp1_write(rkisp1, reg, RKISP1_CIF_MI_XTD_FORMAT_CTRL); + } rkisp1_mi_config_ctrl(cap); @@ -421,12 +425,15 @@ static void rkisp1_sp_config(struct rkisp1_capture *cap) rkisp1_irq_frame_end_enable(cap); - reg = rkisp1_read(rkisp1, RKISP1_CIF_MI_XTD_FORMAT_CTRL); - if (cap->pix.cfg->uv_swap) - reg |= RKISP1_CIF_MI_XTD_FMT_CTRL_SP_CB_CR_SWAP; - else - reg &= ~RKISP1_CIF_MI_XTD_FMT_CTRL_SP_CB_CR_SWAP; - rkisp1_write(rkisp1, reg, RKISP1_CIF_MI_XTD_FORMAT_CTRL); + /* set uv swapping for semiplanar formats */ + if (cap->pix.info->comp_planes == 2) { + reg = rkisp1_read(rkisp1, RKISP1_CIF_MI_XTD_FORMAT_CTRL); + if (cap->pix.cfg->uv_swap) + reg |= RKISP1_CIF_MI_XTD_FMT_CTRL_SP_CB_CR_SWAP; + else + reg &= ~RKISP1_CIF_MI_XTD_FMT_CTRL_SP_CB_CR_SWAP; + rkisp1_write(rkisp1, reg, RKISP1_CIF_MI_XTD_FORMAT_CTRL); + } rkisp1_mi_config_ctrl(cap); -- 2.7.4