From c62936205e41b4fea5ef4752949dc18ec448eb42 Mon Sep 17 00:00:00 2001 From: Ari Suonpaa Date: Thu, 26 Apr 2018 12:27:44 +0300 Subject: [PATCH] Add test for dynamically indexing output variable components Added test where output variable component is dynamically selected using input data. Graphics test framework was modified to support code inside main function as the output variables are not visible inside a test function. Fixed support for vec4 output variables in the same framework. Previously it was resulting in a code that wasn't accepted by the validator. Affects: dEQP-VK.spirv_assembly.* Components: Vulkan VK-GL-CTS issue: 1122 Change-Id: I78f149b0f709e1d11dd977cc432fec0e5f971bed --- android/cts/master/vk-master.txt | 149 +++++++++++---------- .../spirv_assembly/vktSpvAsm16bitStorageTests.cpp | 30 ++--- .../vktSpvAsmConditionalBranchTests.cpp | 2 +- .../vktSpvAsmGraphicsShaderTestUtil.cpp | 81 ++++++----- .../spirv_assembly/vktSpvAsmImageSamplerTests.cpp | 2 +- .../spirv_assembly/vktSpvAsmIndexingTests.cpp | 132 ++++++++++++++---- .../spirv_assembly/vktSpvAsmInstructionTests.cpp | 84 ++++++------ .../spirv_assembly/vktSpvAsmSpirvVersionTests.cpp | 2 +- .../vulkan/spirv_assembly/vktSpvAsmTypeTests.cpp | 4 +- .../vktSpvAsmUboMatrixPaddingTests.cpp | 2 +- .../spirv_assembly/vktSpvAsmVariableInitTests.cpp | 2 +- .../vktSpvAsmVariablePointersTests.cpp | 8 +- external/vulkancts/mustpass/1.1.0/src/master.txt | 72 ---------- .../mustpass/1.1.0/vk-default-no-waivers.txt | 72 ---------- external/vulkancts/mustpass/1.1.0/vk-default.txt | 72 ---------- external/vulkancts/mustpass/1.1.1/src/master.txt | 72 ---------- .../mustpass/1.1.1/vk-default-no-waivers.txt | 72 ---------- external/vulkancts/mustpass/1.1.1/vk-default.txt | 72 ---------- .../mustpass/1.1.2/vk-default-no-waivers.txt | 149 +++++++++++---------- external/vulkancts/mustpass/1.1.2/vk-default.txt | 149 +++++++++++---------- 20 files changed, 451 insertions(+), 777 deletions(-) diff --git a/android/cts/master/vk-master.txt b/android/cts/master/vk-master.txt index eb637ce..25b88cc 100755 --- a/android/cts/master/vk-master.txt +++ b/android/cts/master/vk-master.txt @@ -209151,18 +209151,18 @@ dEQP-VK.spirv_assembly.instruction.compute.variable_init.private.floatarray dEQP-VK.spirv_assembly.instruction.compute.variable_init.private.struct dEQP-VK.spirv_assembly.instruction.compute.conditional_branch.same_labels_true dEQP-VK.spirv_assembly.instruction.compute.conditional_branch.same_labels_false -dEQP-VK.spirv_assembly.instruction.compute.indexing.opaccesschain_u16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opaccesschain_s16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opaccesschain_u64 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opaccesschain_s64 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opinboundsaccesschain_u16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opinboundsaccesschain_s16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opinboundsaccesschain_u64 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opinboundsaccesschain_s64 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opptraccesschain_u16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opptraccesschain_s16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opptraccesschain_u64 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opptraccesschain_s64 +dEQP-VK.spirv_assembly.instruction.compute.indexing.input.struct.opaccesschain_u16 +dEQP-VK.spirv_assembly.instruction.compute.indexing.input.struct.opaccesschain_s16 +dEQP-VK.spirv_assembly.instruction.compute.indexing.input.struct.opaccesschain_u64 +dEQP-VK.spirv_assembly.instruction.compute.indexing.input.struct.opaccesschain_s64 +dEQP-VK.spirv_assembly.instruction.compute.indexing.input.struct.opinboundsaccesschain_u16 +dEQP-VK.spirv_assembly.instruction.compute.indexing.input.struct.opinboundsaccesschain_s16 +dEQP-VK.spirv_assembly.instruction.compute.indexing.input.struct.opinboundsaccesschain_u64 +dEQP-VK.spirv_assembly.instruction.compute.indexing.input.struct.opinboundsaccesschain_s64 +dEQP-VK.spirv_assembly.instruction.compute.indexing.input.struct.opptraccesschain_u16 +dEQP-VK.spirv_assembly.instruction.compute.indexing.input.struct.opptraccesschain_s16 +dEQP-VK.spirv_assembly.instruction.compute.indexing.input.struct.opptraccesschain_u64 +dEQP-VK.spirv_assembly.instruction.compute.indexing.input.struct.opptraccesschain_s64 dEQP-VK.spirv_assembly.instruction.compute.variable_pointers.compute.reads_opselect_single_buffer dEQP-VK.spirv_assembly.instruction.compute.variable_pointers.compute.reads_opfunctioncall_single_buffer dEQP-VK.spirv_assembly.instruction.compute.variable_pointers.compute.reads_opphi_single_buffer @@ -211969,66 +211969,71 @@ dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_false dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_false_tesse dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_false_geom dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_false_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u16_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u16_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u16_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u16_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u16_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s16_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s16_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s16_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s16_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s16_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u64_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u64_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u64_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u64_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u64_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s64_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s64_tessc 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-dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s16_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u64_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u64_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u64_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u64_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u64_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s64_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s64_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s64_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s64_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s64_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u16_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u16_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u16_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u16_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u16_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s16_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s16_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s16_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s16_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s16_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u64_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u64_tessc 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+dEQP-VK.spirv_assembly.instruction.graphics.indexing.input.struct.opptraccesschain_u16_frag +dEQP-VK.spirv_assembly.instruction.graphics.indexing.input.struct.opptraccesschain_s16_vert +dEQP-VK.spirv_assembly.instruction.graphics.indexing.input.struct.opptraccesschain_s16_tessc +dEQP-VK.spirv_assembly.instruction.graphics.indexing.input.struct.opptraccesschain_s16_tesse +dEQP-VK.spirv_assembly.instruction.graphics.indexing.input.struct.opptraccesschain_s16_geom +dEQP-VK.spirv_assembly.instruction.graphics.indexing.input.struct.opptraccesschain_s16_frag +dEQP-VK.spirv_assembly.instruction.graphics.indexing.input.struct.opptraccesschain_u64_vert +dEQP-VK.spirv_assembly.instruction.graphics.indexing.input.struct.opptraccesschain_u64_tessc +dEQP-VK.spirv_assembly.instruction.graphics.indexing.input.struct.opptraccesschain_u64_tesse +dEQP-VK.spirv_assembly.instruction.graphics.indexing.input.struct.opptraccesschain_u64_geom +dEQP-VK.spirv_assembly.instruction.graphics.indexing.input.struct.opptraccesschain_u64_frag +dEQP-VK.spirv_assembly.instruction.graphics.indexing.input.struct.opptraccesschain_s64_vert +dEQP-VK.spirv_assembly.instruction.graphics.indexing.input.struct.opptraccesschain_s64_tessc +dEQP-VK.spirv_assembly.instruction.graphics.indexing.input.struct.opptraccesschain_s64_tesse +dEQP-VK.spirv_assembly.instruction.graphics.indexing.input.struct.opptraccesschain_s64_geom +dEQP-VK.spirv_assembly.instruction.graphics.indexing.input.struct.opptraccesschain_s64_frag +dEQP-VK.spirv_assembly.instruction.graphics.indexing.output.component_vert +dEQP-VK.spirv_assembly.instruction.graphics.indexing.output.component_tessc +dEQP-VK.spirv_assembly.instruction.graphics.indexing.output.component_tesse +dEQP-VK.spirv_assembly.instruction.graphics.indexing.output.component_geom +dEQP-VK.spirv_assembly.instruction.graphics.indexing.output.component_frag dEQP-VK.spirv_assembly.instruction.graphics.variable_pointers.graphics.reads_opselect_single_buffer_vert dEQP-VK.spirv_assembly.instruction.graphics.variable_pointers.graphics.reads_opselect_single_buffer_tessc dEQP-VK.spirv_assembly.instruction.graphics.variable_pointers.graphics.reads_opselect_single_buffer_tesse diff --git a/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsm16bitStorageTests.cpp b/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsm16bitStorageTests.cpp index cafc0e2..2dbc069 100644 --- a/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsm16bitStorageTests.cpp +++ b/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsm16bitStorageTests.cpp @@ -2166,7 +2166,7 @@ void addGraphics16BitStorageUniformInt32To16Group (tcu::TestCaseGroup* testGroup "OpDecorate %ssbo16 Binding 1\n"); const StringTemplate scalarTestFunc( - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" " %param = OpFunctionParameter %v4f32\n" "%entry = OpLabel\n" @@ -2228,7 +2228,7 @@ void addGraphics16BitStorageUniformInt32To16Group (tcu::TestCaseGroup* testGroup "OpDecorate %ssbo16 Binding 1\n"); const StringTemplate vecTestFunc( - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" " %param = OpFunctionParameter %v4f32\n" "%entry = OpLabel\n" @@ -3353,7 +3353,7 @@ void addGraphics16BitStorageUniformFloat32To16Group (tcu::TestCaseGroup* testGro "${rounddecor}\n"); fragments["testfun"] = - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" " %param = OpFunctionParameter %v4f32\n" "%entry = OpLabel\n" @@ -3446,7 +3446,7 @@ void addGraphics16BitStorageUniformFloat32To16Group (tcu::TestCaseGroup* testGro // ssbo16[] <- convert ssbo32[] to 16bit float fragments["testfun"] = - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" " %param = OpFunctionParameter %v4f32\n" "%entry = OpLabel\n" @@ -3544,7 +3544,7 @@ void addGraphics16BitStorageUniformFloat32To16Group (tcu::TestCaseGroup* testGro "${rounddecor}\n"); fragments["testfun"] = - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" " %param = OpFunctionParameter %v4f32\n" "%entry = OpLabel\n" @@ -4399,7 +4399,7 @@ void addGraphics16BitStoragePushConstantFloat16To32Group (tcu::TestCaseGroup* te getDefaultColors(defaultColors); const StringTemplate testFun ( - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" " %param = OpFunctionParameter %v4f32\n" "%entry = OpLabel\n" @@ -4711,7 +4711,7 @@ void addGraphics16BitStoragePushConstantInt16To32Group (tcu::TestCaseGroup* test getDefaultColors(defaultColors); const StringTemplate testFun ( - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" " %param = OpFunctionParameter %v4f32\n" "%entry = OpLabel\n" @@ -5068,7 +5068,7 @@ void addGraphics16BitStorageUniformInt16To32Group (tcu::TestCaseGroup* testGroup "OpDecorate %ssbo16 Binding 0\n"); const StringTemplate scalarTestFunc ( - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" " %param = OpFunctionParameter %v4f32\n" "%entry = OpLabel\n" @@ -5130,7 +5130,7 @@ void addGraphics16BitStorageUniformInt16To32Group (tcu::TestCaseGroup* testGroup "OpDecorate %ssbo16 Binding 0\n"); const StringTemplate vecTestFunc ( - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" " %param = OpFunctionParameter %v4f32\n" "%entry = OpLabel\n" @@ -5294,7 +5294,7 @@ void addGraphics16BitStorageUniformFloat16To32Group (tcu::TestCaseGroup* testGro // ssbo32[] <- convert ssbo16[] to 32bit float const StringTemplate testFun ( - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" " %param = OpFunctionParameter %v4f32\n" "%entry = OpLabel\n" @@ -5400,7 +5400,7 @@ void addGraphics16BitStorageUniformFloat16To32Group (tcu::TestCaseGroup* testGro // ssbo32[] <- convert ssbo16[] to 32bit float const StringTemplate testFun ( - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" " %param = OpFunctionParameter %v4f32\n" "%entry = OpLabel\n" @@ -5510,7 +5510,7 @@ void addGraphics16BitStorageUniformFloat16To32Group (tcu::TestCaseGroup* testGro "OpDecorate %ssbo16 Binding 0\n"); fragments["testfun"] = - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" " %param = OpFunctionParameter %v4f32\n" "%entry = OpLabel\n" @@ -5659,7 +5659,7 @@ void addGraphics16BitStorageUniformStructFloat16To32Group (tcu::TestCaseGroup* t "\n"); fragments["testfun"] = - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" " %param = OpFunctionParameter %v4f32\n" "%label = OpLabel\n" "%loopNdx = OpVariable %fp_i32 Function\n" @@ -5891,7 +5891,7 @@ void addGraphics16BitStorageUniformStructFloat32To16Group (tcu::TestCaseGroup* t "\n"); fragments["testfun"] = - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "%param = OpFunctionParameter %v4f32\n" "%label = OpLabel\n" "%loopNdx = OpVariable %fp_i32 Function\n" @@ -6138,7 +6138,7 @@ void addGraphics16bitStructMixedTypesGroup (tcu::TestCaseGroup* group) "OpDecorate %ssboOUT Binding 1\n"); const StringTemplate testFun ( - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "%param = OpFunctionParameter %v4f32\n" "%label = OpLabel\n" "%ndxArrx = OpVariable %fp_i32 Function\n" diff --git a/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmConditionalBranchTests.cpp b/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmConditionalBranchTests.cpp index 41f48fc..dffd2f4 100644 --- a/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmConditionalBranchTests.cpp +++ b/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmConditionalBranchTests.cpp @@ -166,7 +166,7 @@ void addGraphicsSameLabelsTest (tcu::TestCaseGroup* group) " OpDecorate %dataOutput Binding 0\n"; const StringTemplate testFun ( - " %test_code = OpFunction %v4f32 None %v4f32_function\n" + " %test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" " %param = OpFunctionParameter %v4f32\n" " %entry = OpLabel\n" diff --git a/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmGraphicsShaderTestUtil.cpp b/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmGraphicsShaderTestUtil.cpp index 2b9adec..adc7920 100644 --- a/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmGraphicsShaderTestUtil.cpp +++ b/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmGraphicsShaderTestUtil.cpp @@ -394,7 +394,7 @@ void createPipelineShaderStages (const DeviceInterface& vk, "%v4f32 = OpTypeVector %f32 4\n" \ "%v4bool = OpTypeVector %bool 4\n" \ \ - "%v4f32_function = OpTypeFunction %v4f32 %v4f32\n" \ + "%v4f32_v4f32_function = OpTypeFunction %v4f32 %v4f32\n" \ "%bool_function = OpTypeFunction %bool\n" \ "%fun = OpTypeFunction %void\n" \ \ @@ -509,6 +509,7 @@ string makeVertexShaderAssembly (const map& fragments) "%BP_main = OpFunction %void None %fun\n" "%BP_label = OpLabel\n" "${IF_carryforward:opt}\n" + "${post_interface_op_vert:opt}\n" "%BP_pos = OpLoad %v4f32 %BP_position\n" "%BP_gl_pos = OpAccessChain %op_v4f32 %BP_stream %c_i32_0\n" "OpStore %BP_gl_pos %BP_pos\n" @@ -609,6 +610,7 @@ string makeTessControlShaderAssembly (const map& fragments) "%BP_label = OpLabel\n" "%BP_gl_Invoc = OpLoad %i32 %BP_gl_InvocationID\n" "${IF_carryforward:opt}\n" + "${post_interface_op_tessc:opt}\n" "%BP_in_col_loc = OpAccessChain %ip_v4f32 %BP_in_color %BP_gl_Invoc\n" "%BP_out_col_loc = OpAccessChain %op_v4f32 %BP_out_color %BP_gl_Invoc\n" "%BP_in_col_val = OpLoad %v4f32 %BP_in_col_loc\n" @@ -725,6 +727,7 @@ string makeTessEvalShaderAssembly (const map& fragments) "%BP_main = OpFunction %void None %fun\n" "%BP_label = OpLabel\n" "${IF_carryforward:opt}\n" + "${post_interface_op_tesse:opt}\n" "%BP_gl_TC_0 = OpAccessChain %ip_f32 %BP_gl_TessCoord %c_u32_0\n" "%BP_gl_TC_1 = OpAccessChain %ip_f32 %BP_gl_TessCoord %c_u32_1\n" "%BP_gl_TC_2 = OpAccessChain %ip_f32 %BP_gl_TessCoord %c_u32_2\n" @@ -872,6 +875,7 @@ string makeGeometryShaderAssembly (const map& fragments) "%BP_label = OpLabel\n" "${IF_carryforward:opt}\n" + "${post_interface_op_geom:opt}\n" "%BP_primitiveId = OpLoad %i32 %BP_gl_PrimitiveID\n" "%BP_addr_vertexIdInCurrentPatch = OpAccessChain %BP_pp_i32 %BP_vertexIdInCurrentPatch %BP_primitiveId\n" @@ -973,6 +977,7 @@ string makeFragmentShaderAssembly (const map& fragments) "%BP_main = OpFunction %void None %fun\n" "%BP_label_main = OpLabel\n" "${IF_carryforward:opt}\n" + "${post_interface_op_frag:opt}\n" "%BP_tmp1 = OpLoad %v4f32 %BP_vtxColor\n" "%BP_tmp2 = OpFunctionCall %v4f32 %test_code %BP_tmp1\n" "OpStore %BP_fragColor %BP_tmp2\n" @@ -1042,11 +1047,12 @@ map passthruInterface (const IFDataType& data_type) "%op_" + var_type + " = OpTypePointer Output %" + var_type + "\n"; } - fragments["pre_main"] += - functype + " = OpTypeFunction %" + var_type + " %" + var_type + "\n" - "%a3" + var_type + " = OpTypeArray %" + var_type + " %c_i32_3\n" - "%ip_a3" + var_type + " = OpTypePointer Input %a3" + var_type + "\n" - "%op_a3" + var_type + " = OpTypePointer Output %a3" + var_type + "\n"; + if (strcmp(var_type.c_str(), "v4f32") != 0) + fragments["pre_main"] += + functype + " = OpTypeFunction %" + var_type + " %" + var_type + "\n" + "%a3" + var_type + " = OpTypeArray %" + var_type + " %c_i32_3\n" + "%ip_a3" + var_type + " = OpTypePointer Input %a3" + var_type + "\n" + "%op_a3" + var_type + " = OpTypePointer Output %a3" + var_type + "\n"; return fragments; } @@ -1074,13 +1080,14 @@ map fillInterfacePlaceholderVert (void) " OpStore %IF_output %IF_result\n"; // Make sure the rest still need to be instantialized. - fragments["capability"] = "${capability:opt}"; - fragments["extension"] = "${extension:opt}"; - fragments["debug"] = "${debug:opt}"; - fragments["decoration"] = "${decoration:opt}"; - fragments["pre_main"] = "${pre_main:opt}"; - fragments["testfun"] = "${testfun}"; - fragments["interface_op_func"] = "${interface_op_func}"; + fragments["capability"] = "${capability:opt}"; + fragments["extension"] = "${extension:opt}"; + fragments["debug"] = "${debug:opt}"; + fragments["decoration"] = "${decoration:opt}"; + fragments["pre_main"] = "${pre_main:opt}"; + fragments["testfun"] = "${testfun}"; + fragments["interface_op_func"] = "${interface_op_func}"; + fragments["post_interface_op_vert"] = "${post_interface_op_vert:opt}"; return fragments; } @@ -1109,13 +1116,14 @@ map fillInterfacePlaceholderFrag (void) " OpStore %IF_output %IF_result\n"; // Make sure the rest still need to be instantialized. - fragments["capability"] = "${capability:opt}"; - fragments["extension"] = "${extension:opt}"; - fragments["debug"] = "${debug:opt}"; - fragments["decoration"] = "${decoration:opt}"; - fragments["pre_main"] = "${pre_main:opt}"; - fragments["testfun"] = "${testfun}"; - fragments["interface_op_func"] = "${interface_op_func}"; + fragments["capability"] = "${capability:opt}"; + fragments["extension"] = "${extension:opt}"; + fragments["debug"] = "${debug:opt}"; + fragments["decoration"] = "${decoration:opt}"; + fragments["pre_main"] = "${pre_main:opt}"; + fragments["testfun"] = "${testfun}"; + fragments["interface_op_func"] = "${interface_op_func}"; + fragments["post_interface_op_frag"] = "${post_interface_op_frag:opt}"; return fragments; } @@ -1156,13 +1164,14 @@ map fillInterfacePlaceholderTessCtrl (void) "OpStore %IF_output_ptr2 %IF_input_res2\n"; // Make sure the rest still need to be instantialized. - fragments["capability"] = "${capability:opt}"; - fragments["extension"] = "${extension:opt}"; - fragments["debug"] = "${debug:opt}"; - fragments["decoration"] = "${decoration:opt}"; - fragments["pre_main"] = "${pre_main:opt}"; - fragments["testfun"] = "${testfun}"; - fragments["interface_op_func"] = "${interface_op_func}"; + fragments["capability"] = "${capability:opt}"; + fragments["extension"] = "${extension:opt}"; + fragments["debug"] = "${debug:opt}"; + fragments["decoration"] = "${decoration:opt}"; + fragments["pre_main"] = "${pre_main:opt}"; + fragments["testfun"] = "${testfun}"; + fragments["interface_op_func"] = "${interface_op_func}"; + fragments["post_interface_op_tessc"] = "${post_interface_op_tessc:opt}"; return fragments; } @@ -1193,13 +1202,15 @@ map fillInterfacePlaceholderTessEvalGeom (void) "OpStore %IF_output %IF_input_res0\n"; // Make sure the rest still need to be instantialized. - fragments["capability"] = "${capability:opt}"; - fragments["extension"] = "${extension:opt}"; - fragments["debug"] = "${debug:opt}"; - fragments["decoration"] = "${decoration:opt}"; - fragments["pre_main"] = "${pre_main:opt}"; - fragments["testfun"] = "${testfun}"; - fragments["interface_op_func"] = "${interface_op_func}"; + fragments["capability"] = "${capability:opt}"; + fragments["extension"] = "${extension:opt}"; + fragments["debug"] = "${debug:opt}"; + fragments["decoration"] = "${decoration:opt}"; + fragments["pre_main"] = "${pre_main:opt}"; + fragments["testfun"] = "${testfun}"; + fragments["interface_op_func"] = "${interface_op_func}"; + fragments["post_interface_op_tesse"] = "${post_interface_op_tesse:opt}"; + fragments["post_interface_op_geom"] = "${post_interface_op_geom:opt}"; return fragments; } @@ -1209,7 +1220,7 @@ map passthruFragments (void) map fragments; fragments["testfun"] = // A %test_code function that returns its argument unchanged. - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "%param1 = OpFunctionParameter %v4f32\n" "%label_testfun = OpLabel\n" "OpReturnValue %param1\n" diff --git a/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmImageSamplerTests.cpp b/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmImageSamplerTests.cpp index ec739ef..ed9c87e 100644 --- a/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmImageSamplerTests.cpp +++ b/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmImageSamplerTests.cpp @@ -916,7 +916,7 @@ map generateGraphicsImageSamplerSource (ReadOp readOp, Descripto " OpReturn\n" " OpFunctionEnd\n" - " %test_code = OpFunction %v4f32 None %v4f32_function\n" + " %test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" " %param = OpFunctionParameter %v4f32\n" " %entry = OpLabel\n" diff --git a/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmIndexingTests.cpp b/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmIndexingTests.cpp index a6fcd6f..27ac74e 100644 --- a/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmIndexingTests.cpp +++ b/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmIndexingTests.cpp @@ -2,7 +2,7 @@ * Vulkan Conformance Tests * ------------------------ * - * Copyright (c) 2017 Google Inc. + * Copyright (c) 2018 Google Inc. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -41,6 +41,7 @@ using std::pair; using tcu::IVec3; using tcu::RGBA; using tcu::UVec4; +using tcu::Vec4; using tcu::Mat4; using tcu::StringTemplate; @@ -64,15 +65,16 @@ struct InputData Mat4 matrix[32][32]; }; -void addComputeIndexingTests (tcu::TestCaseGroup* group) +void addComputeIndexingStructTests (tcu::TestCaseGroup* group) { - tcu::TestContext& testCtx = group->getTestContext(); - de::Random rnd (deStringHash(group->getName())); - const int numItems = 128; - const int numStructs = 2; - const int numInputFloats = (int)sizeof(InputData) / 4 * numStructs; - vector inputData; - vector indexSelectorData; + tcu::TestContext& testCtx = group->getTestContext(); + de::MovePtr structGroup (new tcu::TestCaseGroup(testCtx, "struct", "Tests for indexing input struct.")); + de::Random rnd (deStringHash(group->getName())); + const int numItems = 128; + const int numStructs = 2; + const int numInputFloats = (int)sizeof(InputData) / 4 * numStructs; + vector inputData; + vector indexSelectorData; inputData.reserve(numInputFloats); for (deUint32 numIdx = 0; numIdx < numInputFloats; ++numIdx) @@ -266,21 +268,24 @@ void addComputeIndexingTests (tcu::TestCaseGroup* group) spec.outputs.push_back(BufferSp(new Float32Buffer(outputData))); - group->addChild(new SpvAsmComputeShaderCase(testCtx, testName.c_str(), testName.c_str(), spec, features)); + structGroup->addChild(new SpvAsmComputeShaderCase(testCtx, testName.c_str(), testName.c_str(), spec, features)); } } } + group->addChild(structGroup.release()); } -void addGraphicsIndexingTests (tcu::TestCaseGroup* group) +void addGraphicsIndexingStructTests (tcu::TestCaseGroup* group) { - de::Random rnd (deStringHash(group->getName())); - const int numItems = 128; - const int numStructs = 2; - const int numInputFloats = (int)sizeof(InputData) / 4 * numStructs; - RGBA defaultColors[4]; - vector inputData; - vector indexSelectorData; + tcu::TestContext& testCtx = group->getTestContext(); + de::MovePtr structGroup (new tcu::TestCaseGroup(testCtx, "struct", "Tests for indexing input struct.")); + de::Random rnd (deStringHash(group->getName())); + const int numItems = 128; + const int numStructs = 2; + const int numInputFloats = (int)sizeof(InputData) / 4 * numStructs; + RGBA defaultColors[4]; + vector inputData; + vector indexSelectorData; inputData.reserve(numInputFloats); for (deUint32 numIdx = 0; numIdx < numInputFloats; ++numIdx) @@ -371,7 +376,7 @@ void addGraphicsIndexingTests (tcu::TestCaseGroup* group) // Index an input buffer containing 2D array of 4x4 matrices. The indices are read from another // input and converted to the desired bit size and sign. const StringTemplate testFun( - " %test_code = OpFunction %v4f32 None %v4f32_function\n" + " %test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" " %param = OpFunctionParameter %v4f32\n" " %entry = OpLabel\n" @@ -484,28 +489,103 @@ void addGraphicsIndexingTests (tcu::TestCaseGroup* group) createTestsForAllStages( testName.c_str(), defaultColors, defaultColors, fragments, noSpecConstants, - noPushConstants, resources, noInterfaces, extensions, features, vulkanFeatures, group); + noPushConstants, resources, noInterfaces, extensions, features, vulkanFeatures, structGroup.get()); } } } + group->addChild(structGroup.release()); +} + +void addGraphicsOutputComponentIndexingTests (tcu::TestCaseGroup* testGroup) +{ + RGBA defaultColors[4]; + vector noExtensions; + map fragments = passthruFragments(); + const deUint32 numItems = 4; + vector inputData; + vector outputData; + const deInt32 pattern[] = { 2, 0, 1, 3 }; + + for (deUint32 itemIdx = 0; itemIdx < numItems; ++itemIdx) + { + Vec4 output(0.0f); + output[pattern[itemIdx]] = 1.0f; + outputData.push_back(output.x()); + outputData.push_back(output.y()); + outputData.push_back(output.z()); + outputData.push_back(output.w()); + inputData.push_back(pattern[itemIdx]); + } + + getDefaultColors(defaultColors); + + fragments["pre_main"] = + " %a3u32 = OpTypeArray %u32 %c_i32_3\n" + " %ip_a3u32 = OpTypePointer Input %a3u32\n" + "%v4f32_u32_function = OpTypeFunction %v4f32 %u32\n"; + + fragments["interface_op_func"] = + "%interface_op_func = OpFunction %v4f32 None %v4f32_u32_function\n" + " %io_param1 = OpFunctionParameter %u32\n" + " %entry = OpLabel\n" + " %ret = OpCompositeConstruct %v4f32 %c_f32_0 %c_f32_0 %c_f32_0 %c_f32_0\n" + " OpReturnValue %ret\n" + " OpFunctionEnd\n"; + + fragments["post_interface_op_vert"] = fragments["post_interface_op_frag"] = + "%cpntPtr = OpAccessChain %op_f32 %IF_output %IF_input_val\n" + " OpStore %cpntPtr %c_f32_1\n"; + + fragments["post_interface_op_tessc"] = + "%cpntPtr0 = OpAccessChain %op_f32 %IF_output %c_i32_0 %IF_input_val0\n" + " OpStore %cpntPtr0 %c_f32_1\n" + "%cpntPtr1 = OpAccessChain %op_f32 %IF_output %c_i32_1 %IF_input_val1\n" + " OpStore %cpntPtr1 %c_f32_1\n" + "%cpntPtr2 = OpAccessChain %op_f32 %IF_output %c_i32_2 %IF_input_val2\n" + " OpStore %cpntPtr2 %c_f32_1\n"; + + fragments["post_interface_op_tesse"] = fragments["post_interface_op_geom"] = + "%cpntPtr = OpAccessChain %op_f32 %IF_output %IF_input_val0\n" + " OpStore %cpntPtr %c_f32_1\n"; + + fragments["input_type"] = "u32"; + fragments["output_type"] = "v4f32"; + + GraphicsInterfaces interfaces; + + interfaces.setInputOutput(std::make_pair(IFDataType(1, NUMBERTYPE_UINT32), BufferSp(new Int32Buffer(inputData))), + std::make_pair(IFDataType(4, NUMBERTYPE_FLOAT32), BufferSp(new Float32Buffer(outputData)))); + + createTestsForAllStages("component", defaultColors, defaultColors, fragments, interfaces, noExtensions, testGroup); } } // anonymous tcu::TestCaseGroup* createIndexingComputeGroup (tcu::TestContext& testCtx) { - de::MovePtr group (new tcu::TestCaseGroup(testCtx, "indexing", "Compute tests for data indexing.")); - addComputeIndexingTests(group.get()); + de::MovePtr indexingGroup (new tcu::TestCaseGroup(testCtx, "indexing", "Compute tests for data indexing.")); + de::MovePtr inputGroup (new tcu::TestCaseGroup(testCtx, "input", "Tests for indexing input data.")); + + addComputeIndexingStructTests(inputGroup.get()); + + indexingGroup->addChild(inputGroup.release()); - return group.release(); + return indexingGroup.release(); } tcu::TestCaseGroup* createIndexingGraphicsGroup (tcu::TestContext& testCtx) { - de::MovePtr group (new tcu::TestCaseGroup(testCtx, "indexing", "Graphics tests for data indexing.")); - addGraphicsIndexingTests(group.get()); + de::MovePtr indexingGroup (new tcu::TestCaseGroup(testCtx, "indexing", "Graphics tests for data indexing.")); + de::MovePtr inputGroup (new tcu::TestCaseGroup(testCtx, "input", "Tests for indexing input data.")); + de::MovePtr outputGroup (new tcu::TestCaseGroup(testCtx, "output", "Tests for indexing output data.")); + + addGraphicsIndexingStructTests(inputGroup.get()); + addGraphicsOutputComponentIndexingTests(outputGroup.get()); + + indexingGroup->addChild(inputGroup.release()); + indexingGroup->addChild(outputGroup.release()); - return group.release(); + return indexingGroup.release(); } } // SpirVAssembly diff --git a/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmInstructionTests.cpp b/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmInstructionTests.cpp index eb4b8f9..785fa84 100644 --- a/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmInstructionTests.cpp +++ b/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmInstructionTests.cpp @@ -5569,7 +5569,7 @@ tcu::TestCaseGroup* createOpNoLineTests(tcu::TestContext& testCtx) "OpNoLine\n" "OpLine %name 1 1\n" "OpLine %name 1 1\n" - "%second_function = OpFunction %v4f32 None %v4f32_function\n" + "%second_function = OpFunction %v4f32 None %v4f32_v4f32_function\n" "OpNoLine\n" "OpLine %name 1 1\n" "OpNoLine\n" @@ -5590,7 +5590,7 @@ tcu::TestCaseGroup* createOpNoLineTests(tcu::TestContext& testCtx) "OpNoLine\n" "OpNoLine\n" "OpLine %name 1 1\n" - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "OpNoLine\n" "%param1 = OpFunctionParameter %v4f32\n" "OpNoLine\n" @@ -5626,7 +5626,7 @@ tcu::TestCaseGroup* createOpModuleProcessedTests(tcu::TestContext& testCtx) "OpModuleProcessed \"Date: 2017/09/21\"\n"; fragments["pre_main"] = - "%second_function = OpFunction %v4f32 None %v4f32_function\n" + "%second_function = OpFunction %v4f32 None %v4f32_v4f32_function\n" "%second_param1 = OpFunctionParameter %v4f32\n" "%label_secondfunction = OpLabel\n" "OpReturnValue %second_param1\n" @@ -5634,7 +5634,7 @@ tcu::TestCaseGroup* createOpModuleProcessedTests(tcu::TestContext& testCtx) fragments["testfun"] = // A %test_code function that returns its argument unchanged. - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "%param1 = OpFunctionParameter %v4f32\n" "%label_testfun = OpLabel\n" "%val1 = OpFunctionCall %v4f32 %second_function %param1\n" @@ -5672,7 +5672,7 @@ tcu::TestCaseGroup* createOpLineTests(tcu::TestContext& testCtx) "OpLine %other_name 4294967295 0\n" "OpLine %other_name 32 40\n" "OpLine %file_name 0 0\n" - "%second_function = OpFunction %v4f32 None %v4f32_function\n" + "%second_function = OpFunction %v4f32 None %v4f32_v4f32_function\n" "OpLine %file_name 1 0\n" "%second_param1 = OpFunctionParameter %v4f32\n" "OpLine %file_name 1 3\n" @@ -5687,7 +5687,7 @@ tcu::TestCaseGroup* createOpLineTests(tcu::TestContext& testCtx) fragments["testfun"] = // A %test_code function that returns its argument unchanged. "OpLine %file_name 1 0\n" - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "OpLine %file_name 16 330\n" "%param1 = OpFunctionParameter %v4f32\n" "OpLine %file_name 14 442\n" @@ -5716,7 +5716,7 @@ tcu::TestCaseGroup* createOpConstantNullTests(tcu::TestContext& testCtx) const char functionStart[] = - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "%param1 = OpFunctionParameter %v4f32\n" "%lbl = OpLabel\n"; @@ -5833,7 +5833,7 @@ tcu::TestCaseGroup* createOpConstantCompositeTests(tcu::TestContext& testCtx) const char functionStart[] = - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "%param1 = OpFunctionParameter %v4f32\n" "%lbl = OpLabel\n"; @@ -5984,7 +5984,7 @@ tcu::TestCaseGroup* createSelectionBlockOrderTests(tcu::TestContext& testCtx) // return result; // } const char function[] = - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "%param1 = OpFunctionParameter %v4f32\n" "%lbl = OpLabel\n" "%iptr = OpVariable %fp_i32 Function\n" @@ -6076,7 +6076,7 @@ tcu::TestCaseGroup* createSwitchBlockOrderTests(tcu::TestContext& testCtx) // return result; // } const char function[] = - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "%param1 = OpFunctionParameter %v4f32\n" "%lbl = OpLabel\n" "%iptr = OpVariable %fp_i32 Function\n" @@ -6189,7 +6189,7 @@ tcu::TestCaseGroup* createDecorationGroupTests(tcu::TestContext& testCtx) "%c_struct2 = OpConstantComposite %struct2 %c_a3f32_2\n"; const char function[] = - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "%param = OpFunctionParameter %v4f32\n" "%entry = OpLabel\n" "%result = OpVariable %fp_v4f32 Function\n" @@ -6323,7 +6323,7 @@ tcu::TestCaseGroup* createSpecConstantTests (tcu::TestContext& testCtx) "%sc_op = OpSpecConstantOp ${SC_RESULT_TYPE} ${SC_OP}\n"; const char function1[] = - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "%param = OpFunctionParameter %v4f32\n" "%label = OpLabel\n" "${TYPE_CONVERT:opt}" @@ -6477,7 +6477,7 @@ tcu::TestCaseGroup* createSpecConstantTests (tcu::TestContext& testCtx) "%sc_final = OpSpecConstantOp %i32 IMul %sc_sub %sc_ext_2\n"; // (sc_2 - sc_0) * sc_1 const char function2[] = - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "%param = OpFunctionParameter %v4f32\n" "%label = OpLabel\n" "%result = OpVariable %fp_v4f32 Function\n" @@ -6539,7 +6539,7 @@ tcu::TestCaseGroup* createOpPhiTests(tcu::TestContext& testCtx) // return result; // } const char function1[] = - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "%param1 = OpFunctionParameter %v4f32\n" "%lbl = OpLabel\n" "%iptr = OpVariable %fp_i32 Function\n" @@ -6603,7 +6603,7 @@ tcu::TestCaseGroup* createOpPhiTests(tcu::TestContext& testCtx) // Add .4 to the second element of the given parameter. const char function2[] = - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "%param = OpFunctionParameter %v4f32\n" "%entry = OpLabel\n" "%result = OpVariable %fp_v4f32 Function\n" @@ -6645,7 +6645,7 @@ tcu::TestCaseGroup* createOpPhiTests(tcu::TestContext& testCtx) // Swap the second and the third element of the given parameter. const char function3[] = - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "%param = OpFunctionParameter %v4f32\n" "%entry = OpLabel\n" "%result = OpVariable %fp_v4f32 Function\n" @@ -6702,7 +6702,7 @@ tcu::TestCaseGroup* createNoContractionTests(tcu::TestContext& testCtx) "%c_f32_n1pn24 = OpConstant %f32 -0x1p-24\n"; const char function[] = - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "%param = OpFunctionParameter %v4f32\n" "%label = OpLabel\n" "%var1 = OpVariable %fp_f32 Function %c_f32_1pl2_23\n" @@ -6769,7 +6769,7 @@ tcu::TestCaseGroup* createMemoryAccessTests(tcu::TestContext& testCtx) "%fp_stype = OpTypePointer Function %stype\n"; const char function[] = - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "%param1 = OpFunctionParameter %v4f32\n" "%lbl = OpLabel\n" "%v1 = OpVariable %fp_v4f32 Function\n" @@ -6862,7 +6862,7 @@ tcu::TestCaseGroup* createOpUndefTests(tcu::TestContext& testCtx) { fragments["undef_type"] = tests[testNdx].type; fragments["testfun"] = StringTemplate( - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "%param1 = OpFunctionParameter %v4f32\n" "%label_testfun = OpLabel\n" "%undef = OpUndef ${undef_type}\n" @@ -6874,7 +6874,7 @@ tcu::TestCaseGroup* createOpUndefTests(tcu::TestContext& testCtx) fragments.clear(); fragments["testfun"] = - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "%param1 = OpFunctionParameter %v4f32\n" "%label_testfun = OpLabel\n" "%undef = OpUndef %f32\n" @@ -6890,7 +6890,7 @@ tcu::TestCaseGroup* createOpUndefTests(tcu::TestContext& testCtx) createTestsForAllStages("float32", defaultColors, defaultColors, fragments, opUndefTests.get()); fragments["testfun"] = - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "%param1 = OpFunctionParameter %v4f32\n" "%label_testfun = OpLabel\n" "%undef = OpUndef %i32\n" @@ -6903,7 +6903,7 @@ tcu::TestCaseGroup* createOpUndefTests(tcu::TestContext& testCtx) createTestsForAllStages("sint32", defaultColors, defaultColors, fragments, opUndefTests.get()); fragments["testfun"] = - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "%param1 = OpFunctionParameter %v4f32\n" "%label_testfun = OpLabel\n" "%undef = OpUndef %u32\n" @@ -6916,7 +6916,7 @@ tcu::TestCaseGroup* createOpUndefTests(tcu::TestContext& testCtx) createTestsForAllStages("uint32", defaultColors, defaultColors, fragments, opUndefTests.get()); fragments["testfun"] = - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "%param1 = OpFunctionParameter %v4f32\n" "%label_testfun = OpLabel\n" "%undef = OpUndef %v4f32\n" @@ -6953,7 +6953,7 @@ tcu::TestCaseGroup* createOpUndefTests(tcu::TestContext& testCtx) fragments["pre_main"] = "%m2x2f32 = OpTypeMatrix %v2f32 2\n"; fragments["testfun"] = - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "%param1 = OpFunctionParameter %v4f32\n" "%label_testfun = OpLabel\n" "%undef = OpUndef %m2x2f32\n" @@ -7113,7 +7113,7 @@ void createOpQuantizeSingleOptionTests(tcu::TestCaseGroup* testCtx) "%test_constant = OpConstant %f32 "; // The value will be test.constant. StringTemplate function ( - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "%param1 = OpFunctionParameter %v4f32\n" "%label_testfun = OpLabel\n" "%a = OpVectorExtractDynamic %f32 %param1 %c_i32_0\n" @@ -7132,7 +7132,7 @@ void createOpQuantizeSingleOptionTests(tcu::TestCaseGroup* testCtx) "%c = OpSpecConstantOp %f32 QuantizeToF16 %test_constant\n"; StringTemplate specConstantFunction( - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "%param1 = OpFunctionParameter %v4f32\n" "%label_testfun = OpLabel\n" "${condition}\n" @@ -7240,7 +7240,7 @@ void createOpQuantizeTwoPossibilityTests(tcu::TestCaseGroup* testCtx) const char* specDecorations = "OpDecorate %input_const SpecId 0\n"; const char* function = - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "%param1 = OpFunctionParameter %v4f32\n" "%label_testfun = OpLabel\n" "%a = OpVectorExtractDynamic %f32 %param1 %c_i32_0\n" @@ -7387,7 +7387,7 @@ tcu::TestCaseGroup* createLoopTests(tcu::TestContext& testCtx) // itself. In SPIR-V terms, the "loop construct" contains no blocks at all // -- the "continue construct" forms the entire loop. fragments["testfun"] = - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "%param1 = OpFunctionParameter %v4f32\n" "%entry = OpLabel\n" @@ -7416,7 +7416,7 @@ tcu::TestCaseGroup* createLoopTests(tcu::TestContext& testCtx) // Body comprised of multiple basic blocks. const StringTemplate multiBlock( - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "%param1 = OpFunctionParameter %v4f32\n" "%entry = OpLabel\n" @@ -7472,7 +7472,7 @@ tcu::TestCaseGroup* createLoopTests(tcu::TestContext& testCtx) // A loop with continue statement. fragments["testfun"] = - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "%param1 = OpFunctionParameter %v4f32\n" "%entry = OpLabel\n" @@ -7512,7 +7512,7 @@ tcu::TestCaseGroup* createLoopTests(tcu::TestContext& testCtx) // A loop with break. fragments["testfun"] = - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "%param1 = OpFunctionParameter %v4f32\n" "%entry = OpLabel\n" @@ -7557,7 +7557,7 @@ tcu::TestCaseGroup* createLoopTests(tcu::TestContext& testCtx) // A loop with return. fragments["testfun"] = - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "%param1 = OpFunctionParameter %v4f32\n" "%entry = OpLabel\n" @@ -7620,7 +7620,7 @@ tcu::TestCaseGroup* createLoopTests(tcu::TestContext& testCtx) "%false = OpConstantFalse %bool\n"; fragments["testfun"] = - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "%param1 = OpFunctionParameter %v4f32\n" "%entry = OpLabel\n" @@ -7680,7 +7680,7 @@ tcu::TestCaseGroup* createBarrierTests(tcu::TestContext& testCtx) "%Workgroup = OpConstant %i32 2\n" "%WorkgroupAcquireRelease = OpConstant %i32 0x108\n"; fragments["testfun"] = - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "%param1 = OpFunctionParameter %v4f32\n" "%label_testfun = OpLabel\n" "OpControlBarrier %Workgroup %Workgroup %WorkgroupAcquireRelease\n" @@ -7694,7 +7694,7 @@ tcu::TestCaseGroup* createBarrierTests(tcu::TestContext& testCtx) "%WorkgroupAcquireRelease = OpConstant %i32 0x108\n" "%c_f32_5 = OpConstant %f32 5.\n"; const string setupPercentZero = // Begins %test_code function with code that sets %zero to 0u but cannot be optimized away. - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "%param1 = OpFunctionParameter %v4f32\n" "%entry = OpLabel\n" ";param1 components are between 0 and 1, so dot product is 4 or less\n" @@ -7784,7 +7784,7 @@ tcu::TestCaseGroup* createBarrierTests(tcu::TestContext& testCtx) "%WorkgroupAcquireRelease = OpConstant %i32 0x108\n" "%c_f32_10 = OpConstant %f32 10.\n"; fragments["testfun"] = - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "%param1 = OpFunctionParameter %v4f32\n" "%entry = OpLabel\n" "%val0 = OpVectorExtractDynamic %f32 %param1 %c_i32_0\n" @@ -7833,7 +7833,7 @@ tcu::TestCaseGroup* createFRemTests(tcu::TestContext& testCtx) // vec4 result = (param1 * 8.0) - 4.0; // return (frem(result.x,3) + 0.75, frem(result.y, -3) + 0.75, 0, 1) fragments["testfun"] = - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "%param1 = OpFunctionParameter %v4f32\n" "%label_testfun = OpLabel\n" "%v_times_8 = OpVectorTimesScalar %v4f32 %param1 %c_f32_8\n" @@ -7879,7 +7879,7 @@ tcu::TestCaseGroup* createOpSRemGraphicsTests(tcu::TestContext& testCtx, qpTestR // ivec4 result = ivec4(srem(ints.x, ints.y), srem(ints.y, ints.z), srem(ints.z, ints.x), 255); // return float(result + 128) / 255.0; fragments["testfun"] = - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "%param1 = OpFunctionParameter %v4f32\n" "%label_testfun = OpLabel\n" "%div255 = OpFMul %v4f32 %param1 %c_v4f32_255\n" @@ -7962,7 +7962,7 @@ tcu::TestCaseGroup* createOpSModGraphicsTests(tcu::TestContext& testCtx, qpTestR // ivec4 result = ivec4(smod(ints.x, ints.y), smod(ints.y, ints.z), smod(ints.z, ints.x), 255); // return float(result + 128) / 255.0; fragments["testfun"] = - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "%param1 = OpFunctionParameter %v4f32\n" "%label_testfun = OpLabel\n" "%div255 = OpFMul %v4f32 %param1 %c_v4f32_255\n" @@ -8499,7 +8499,7 @@ const map getConvertCaseFragments (string instruction, const Con " %SSBOo = OpVariable %ptr_SSBOo StorageBuffer\n"); const StringTemplate testfun ( - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "%param = OpFunctionParameter %v4f32\n" "%label = OpLabel\n" "%iLoc = OpAccessChain %ptr_in %SSBOi %c_u32_0\n" @@ -9327,7 +9327,7 @@ tcu::TestCaseGroup* createOpNopTests (tcu::TestContext& testCtx) getDefaultColors(defaultColors); opNopFragments["testfun"] = - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "%param1 = OpFunctionParameter %v4f32\n" "%label_testfun = OpLabel\n" "OpNop\n" @@ -9365,7 +9365,7 @@ tcu::TestCaseGroup* createOpNameTests (tcu::TestContext& testCtx) "OpName %BP_main \"not_main\""; opNameFragments["testfun"] = - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "%param1 = OpFunctionParameter %v4f32\n" "%label_func = OpLabel\n" "%a = OpVectorExtractDynamic %f32 %param1 %c_i32_0\n" diff --git a/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmSpirvVersionTests.cpp b/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmSpirvVersionTests.cpp index 98ded32..95d4f29 100644 --- a/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmSpirvVersionTests.cpp +++ b/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmSpirvVersionTests.cpp @@ -89,7 +89,7 @@ static InstanceContext initGraphicsInstanceContext (const TestParameters& testPa map opSimpleTest; opSimpleTest["testfun"] = - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "%param1 = OpFunctionParameter %v4f32\n" "%label_testfun = OpLabel\n" "%a = OpVectorExtractDynamic %f32 %param1 %c_i32_0\n" diff --git a/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmTypeTests.cpp b/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmTypeTests.cpp index 374b653..8fd956c 100644 --- a/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmTypeTests.cpp +++ b/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmTypeTests.cpp @@ -497,7 +497,7 @@ void SpvAsmTypeTests::createStageTests (const char* testName, "%bufptr = OpTypePointer Uniform %buf\n" "%output = OpVariable %bufptr Uniform\n"); - const StringTemplate pre_testfun ("%test_code = OpFunction %v4f32 None %v4f32_function\n" + const StringTemplate pre_testfun ("%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "%param = OpFunctionParameter %v4f32\n" "%entry = OpLabel\n" "%counter = OpVariable %fp_i32 Function\n" @@ -835,7 +835,7 @@ void SpvAsmTypeTests::createSwitchTests (void) "%input = OpVariable %bufptr Uniform\n" "%expectedOutput = OpVariable %bufptr Uniform\n"); - const StringTemplate testfun ("%test_code = OpFunction %v4f32 None %v4f32_function\n" + const StringTemplate testfun ("%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "%param = OpFunctionParameter %v4f32\n" "%entry = OpLabel\n" diff --git a/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmUboMatrixPaddingTests.cpp b/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmUboMatrixPaddingTests.cpp index 860fbd6..50e553a 100644 --- a/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmUboMatrixPaddingTests.cpp +++ b/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmUboMatrixPaddingTests.cpp @@ -201,7 +201,7 @@ void addGraphicsUboMatrixPaddingTest (tcu::TestCaseGroup* group) // into output buffer containing floats. The input and output buffer data should match. // The whole array is handled inside a for loop. fragments["testfun"] = - " %test_code = OpFunction %v4f32 None %v4f32_function\n" + " %test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" " %param = OpFunctionParameter %v4f32\n" " %entry = OpLabel\n" diff --git a/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmVariableInitTests.cpp b/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmVariableInitTests.cpp index b5ac224..4ff6d0d 100644 --- a/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmVariableInitTests.cpp +++ b/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmVariableInitTests.cpp @@ -200,7 +200,7 @@ void addGraphicsVariableInitPrivateTest (tcu::TestCaseGroup* group) StringTemplate decoration (decorations); StringTemplate testFun ( - " %test_code = OpFunction %v4f32 None %v4f32_function\n" + " %test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" " %param = OpFunctionParameter %v4f32\n" " %entry = OpLabel\n" " %outputData = OpLoad %${type} %f1\n" diff --git a/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmVariablePointersTests.cpp b/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmVariablePointersTests.cpp index 77e9b33..a3ddc81 100644 --- a/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmVariablePointersTests.cpp +++ b/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmVariablePointersTests.cpp @@ -1302,7 +1302,7 @@ void addVariablePointersGraphicsGroup (tcu::TestCaseGroup* testGroup) "OpDecorate %outdata Binding 3\n"); const StringTemplate testFunction ( - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "%param = OpFunctionParameter %v4f32\n" "%entry = OpLabel\n" @@ -1735,7 +1735,7 @@ void addTwoInputBufferReadOnlyVariablePointersGraphicsGroup (tcu::TestCaseGroup* ); const StringTemplate testFunction ( - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "%param = OpFunctionParameter %v4f32\n" "%entry = OpLabel\n" @@ -2142,7 +2142,7 @@ void addSingleInputBufferReadOnlyVariablePointersGraphicsGroup (tcu::TestCaseGro ); const StringTemplate testFunction ( - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "%param = OpFunctionParameter %v4f32\n" "%entry = OpLabel\n" @@ -2471,7 +2471,7 @@ void addNullptrVariablePointersGraphicsGroup (tcu::TestCaseGroup* testGroup) ); const StringTemplate testFunction ( - "%test_code = OpFunction %v4f32 None %v4f32_function\n" + "%test_code = OpFunction %v4f32 None %v4f32_v4f32_function\n" "%param = OpFunctionParameter %v4f32\n" "%entry = OpLabel\n" diff --git a/external/vulkancts/mustpass/1.1.0/src/master.txt b/external/vulkancts/mustpass/1.1.0/src/master.txt index 77e67ef..dc1c26c 100644 --- a/external/vulkancts/mustpass/1.1.0/src/master.txt +++ b/external/vulkancts/mustpass/1.1.0/src/master.txt @@ -195900,18 +195900,6 @@ dEQP-VK.spirv_assembly.instruction.compute.16bit_storage.uniform_16_to_16.stress dEQP-VK.spirv_assembly.instruction.compute.ubo_padding.mat2x2 dEQP-VK.spirv_assembly.instruction.compute.conditional_branch.same_labels_true dEQP-VK.spirv_assembly.instruction.compute.conditional_branch.same_labels_false -dEQP-VK.spirv_assembly.instruction.compute.indexing.opaccesschain_u16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opaccesschain_s16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opaccesschain_u64 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opaccesschain_s64 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opinboundsaccesschain_u16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opinboundsaccesschain_s16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opinboundsaccesschain_u64 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opinboundsaccesschain_s64 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opptraccesschain_u16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opptraccesschain_s16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opptraccesschain_u64 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opptraccesschain_s64 dEQP-VK.spirv_assembly.instruction.compute.variable_pointers.compute.reads_opselect_single_buffer dEQP-VK.spirv_assembly.instruction.compute.variable_pointers.compute.reads_opfunctioncall_single_buffer dEQP-VK.spirv_assembly.instruction.compute.variable_pointers.compute.reads_opphi_single_buffer @@ -197996,66 +197984,6 @@ dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_false dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_false_tesse dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_false_geom dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_false_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u16_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u16_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u16_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u16_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u16_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s16_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s16_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s16_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s16_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s16_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u64_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u64_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u64_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u64_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u64_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s64_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s64_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s64_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s64_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s64_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u16_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u16_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u16_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u16_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u16_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s16_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s16_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s16_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s16_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s16_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u64_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u64_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u64_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u64_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u64_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s64_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s64_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s64_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s64_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s64_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u16_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u16_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u16_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u16_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u16_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s16_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s16_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s16_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s16_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s16_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u64_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u64_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u64_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u64_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u64_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s64_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s64_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s64_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s64_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s64_frag dEQP-VK.spirv_assembly.instruction.graphics.variable_pointers.graphics.reads_opselect_single_buffer_vert dEQP-VK.spirv_assembly.instruction.graphics.variable_pointers.graphics.reads_opselect_single_buffer_tessc dEQP-VK.spirv_assembly.instruction.graphics.variable_pointers.graphics.reads_opselect_single_buffer_tesse diff --git a/external/vulkancts/mustpass/1.1.0/vk-default-no-waivers.txt b/external/vulkancts/mustpass/1.1.0/vk-default-no-waivers.txt index 77e67ef..dc1c26c 100644 --- a/external/vulkancts/mustpass/1.1.0/vk-default-no-waivers.txt +++ b/external/vulkancts/mustpass/1.1.0/vk-default-no-waivers.txt @@ -195900,18 +195900,6 @@ dEQP-VK.spirv_assembly.instruction.compute.16bit_storage.uniform_16_to_16.stress dEQP-VK.spirv_assembly.instruction.compute.ubo_padding.mat2x2 dEQP-VK.spirv_assembly.instruction.compute.conditional_branch.same_labels_true dEQP-VK.spirv_assembly.instruction.compute.conditional_branch.same_labels_false -dEQP-VK.spirv_assembly.instruction.compute.indexing.opaccesschain_u16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opaccesschain_s16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opaccesschain_u64 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opaccesschain_s64 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opinboundsaccesschain_u16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opinboundsaccesschain_s16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opinboundsaccesschain_u64 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opinboundsaccesschain_s64 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opptraccesschain_u16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opptraccesschain_s16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opptraccesschain_u64 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opptraccesschain_s64 dEQP-VK.spirv_assembly.instruction.compute.variable_pointers.compute.reads_opselect_single_buffer dEQP-VK.spirv_assembly.instruction.compute.variable_pointers.compute.reads_opfunctioncall_single_buffer dEQP-VK.spirv_assembly.instruction.compute.variable_pointers.compute.reads_opphi_single_buffer @@ -197996,66 +197984,6 @@ dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_false dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_false_tesse dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_false_geom dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_false_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u16_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u16_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u16_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u16_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u16_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s16_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s16_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s16_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s16_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s16_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u64_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u64_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u64_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u64_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u64_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s64_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s64_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s64_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s64_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s64_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u16_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u16_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u16_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u16_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u16_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s16_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s16_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s16_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s16_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s16_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u64_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u64_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u64_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u64_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u64_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s64_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s64_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s64_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s64_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s64_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u16_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u16_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u16_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u16_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u16_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s16_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s16_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s16_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s16_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s16_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u64_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u64_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u64_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u64_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u64_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s64_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s64_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s64_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s64_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s64_frag dEQP-VK.spirv_assembly.instruction.graphics.variable_pointers.graphics.reads_opselect_single_buffer_vert dEQP-VK.spirv_assembly.instruction.graphics.variable_pointers.graphics.reads_opselect_single_buffer_tessc dEQP-VK.spirv_assembly.instruction.graphics.variable_pointers.graphics.reads_opselect_single_buffer_tesse diff --git a/external/vulkancts/mustpass/1.1.0/vk-default.txt b/external/vulkancts/mustpass/1.1.0/vk-default.txt index f8178e7..38313ad 100755 --- a/external/vulkancts/mustpass/1.1.0/vk-default.txt +++ b/external/vulkancts/mustpass/1.1.0/vk-default.txt @@ -195900,18 +195900,6 @@ dEQP-VK.spirv_assembly.instruction.compute.16bit_storage.uniform_16_to_16.stress dEQP-VK.spirv_assembly.instruction.compute.ubo_padding.mat2x2 dEQP-VK.spirv_assembly.instruction.compute.conditional_branch.same_labels_true dEQP-VK.spirv_assembly.instruction.compute.conditional_branch.same_labels_false -dEQP-VK.spirv_assembly.instruction.compute.indexing.opaccesschain_u16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opaccesschain_s16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opaccesschain_u64 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opaccesschain_s64 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opinboundsaccesschain_u16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opinboundsaccesschain_s16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opinboundsaccesschain_u64 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opinboundsaccesschain_s64 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opptraccesschain_u16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opptraccesschain_s16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opptraccesschain_u64 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opptraccesschain_s64 dEQP-VK.spirv_assembly.instruction.compute.variable_pointers.compute.reads_opselect_single_buffer dEQP-VK.spirv_assembly.instruction.compute.variable_pointers.compute.reads_opfunctioncall_single_buffer dEQP-VK.spirv_assembly.instruction.compute.variable_pointers.compute.reads_opphi_single_buffer @@ -197996,66 +197984,6 @@ dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_false dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_false_tesse dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_false_geom dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_false_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u16_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u16_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u16_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u16_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u16_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s16_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s16_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s16_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s16_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s16_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u64_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u64_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u64_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u64_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u64_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s64_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s64_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s64_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s64_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s64_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u16_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u16_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u16_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u16_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u16_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s16_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s16_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s16_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s16_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s16_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u64_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u64_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u64_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u64_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u64_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s64_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s64_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s64_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s64_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s64_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u16_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u16_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u16_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u16_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u16_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s16_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s16_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s16_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s16_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s16_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u64_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u64_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u64_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u64_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u64_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s64_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s64_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s64_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s64_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s64_frag dEQP-VK.spirv_assembly.instruction.graphics.variable_pointers.graphics.reads_opselect_single_buffer_vert dEQP-VK.spirv_assembly.instruction.graphics.variable_pointers.graphics.reads_opselect_single_buffer_tessc dEQP-VK.spirv_assembly.instruction.graphics.variable_pointers.graphics.reads_opselect_single_buffer_tesse diff --git a/external/vulkancts/mustpass/1.1.1/src/master.txt b/external/vulkancts/mustpass/1.1.1/src/master.txt index 77e67ef..dc1c26c 100644 --- a/external/vulkancts/mustpass/1.1.1/src/master.txt +++ b/external/vulkancts/mustpass/1.1.1/src/master.txt @@ -195900,18 +195900,6 @@ dEQP-VK.spirv_assembly.instruction.compute.16bit_storage.uniform_16_to_16.stress dEQP-VK.spirv_assembly.instruction.compute.ubo_padding.mat2x2 dEQP-VK.spirv_assembly.instruction.compute.conditional_branch.same_labels_true dEQP-VK.spirv_assembly.instruction.compute.conditional_branch.same_labels_false -dEQP-VK.spirv_assembly.instruction.compute.indexing.opaccesschain_u16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opaccesschain_s16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opaccesschain_u64 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opaccesschain_s64 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opinboundsaccesschain_u16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opinboundsaccesschain_s16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opinboundsaccesschain_u64 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opinboundsaccesschain_s64 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opptraccesschain_u16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opptraccesschain_s16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opptraccesschain_u64 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opptraccesschain_s64 dEQP-VK.spirv_assembly.instruction.compute.variable_pointers.compute.reads_opselect_single_buffer dEQP-VK.spirv_assembly.instruction.compute.variable_pointers.compute.reads_opfunctioncall_single_buffer dEQP-VK.spirv_assembly.instruction.compute.variable_pointers.compute.reads_opphi_single_buffer @@ -197996,66 +197984,6 @@ dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_false dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_false_tesse dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_false_geom dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_false_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u16_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u16_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u16_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u16_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u16_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s16_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s16_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s16_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s16_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s16_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u64_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u64_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u64_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u64_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u64_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s64_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s64_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s64_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s64_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s64_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u16_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u16_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u16_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u16_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u16_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s16_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s16_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s16_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s16_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s16_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u64_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u64_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u64_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u64_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u64_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s64_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s64_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s64_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s64_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s64_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u16_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u16_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u16_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u16_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u16_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s16_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s16_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s16_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s16_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s16_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u64_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u64_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u64_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u64_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u64_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s64_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s64_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s64_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s64_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s64_frag dEQP-VK.spirv_assembly.instruction.graphics.variable_pointers.graphics.reads_opselect_single_buffer_vert dEQP-VK.spirv_assembly.instruction.graphics.variable_pointers.graphics.reads_opselect_single_buffer_tessc dEQP-VK.spirv_assembly.instruction.graphics.variable_pointers.graphics.reads_opselect_single_buffer_tesse diff --git a/external/vulkancts/mustpass/1.1.1/vk-default-no-waivers.txt b/external/vulkancts/mustpass/1.1.1/vk-default-no-waivers.txt index 77e67ef..dc1c26c 100644 --- a/external/vulkancts/mustpass/1.1.1/vk-default-no-waivers.txt +++ b/external/vulkancts/mustpass/1.1.1/vk-default-no-waivers.txt @@ -195900,18 +195900,6 @@ dEQP-VK.spirv_assembly.instruction.compute.16bit_storage.uniform_16_to_16.stress dEQP-VK.spirv_assembly.instruction.compute.ubo_padding.mat2x2 dEQP-VK.spirv_assembly.instruction.compute.conditional_branch.same_labels_true dEQP-VK.spirv_assembly.instruction.compute.conditional_branch.same_labels_false -dEQP-VK.spirv_assembly.instruction.compute.indexing.opaccesschain_u16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opaccesschain_s16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opaccesschain_u64 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opaccesschain_s64 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opinboundsaccesschain_u16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opinboundsaccesschain_s16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opinboundsaccesschain_u64 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opinboundsaccesschain_s64 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opptraccesschain_u16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opptraccesschain_s16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opptraccesschain_u64 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opptraccesschain_s64 dEQP-VK.spirv_assembly.instruction.compute.variable_pointers.compute.reads_opselect_single_buffer dEQP-VK.spirv_assembly.instruction.compute.variable_pointers.compute.reads_opfunctioncall_single_buffer dEQP-VK.spirv_assembly.instruction.compute.variable_pointers.compute.reads_opphi_single_buffer @@ -197996,66 +197984,6 @@ dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_false dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_false_tesse dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_false_geom dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_false_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u16_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u16_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u16_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u16_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u16_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s16_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s16_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s16_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s16_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s16_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u64_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u64_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u64_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u64_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u64_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s64_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s64_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s64_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s64_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s64_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u16_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u16_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u16_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u16_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u16_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s16_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s16_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s16_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s16_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s16_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u64_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u64_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u64_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u64_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_u64_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s64_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s64_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s64_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s64_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opinboundsaccesschain_s64_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u16_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u16_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u16_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u16_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u16_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s16_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s16_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s16_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s16_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s16_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u64_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u64_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u64_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u64_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_u64_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s64_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s64_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s64_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s64_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opptraccesschain_s64_frag dEQP-VK.spirv_assembly.instruction.graphics.variable_pointers.graphics.reads_opselect_single_buffer_vert dEQP-VK.spirv_assembly.instruction.graphics.variable_pointers.graphics.reads_opselect_single_buffer_tessc dEQP-VK.spirv_assembly.instruction.graphics.variable_pointers.graphics.reads_opselect_single_buffer_tesse diff --git a/external/vulkancts/mustpass/1.1.1/vk-default.txt b/external/vulkancts/mustpass/1.1.1/vk-default.txt index f8178e7..38313ad 100644 --- a/external/vulkancts/mustpass/1.1.1/vk-default.txt +++ b/external/vulkancts/mustpass/1.1.1/vk-default.txt @@ -195900,18 +195900,6 @@ dEQP-VK.spirv_assembly.instruction.compute.16bit_storage.uniform_16_to_16.stress dEQP-VK.spirv_assembly.instruction.compute.ubo_padding.mat2x2 dEQP-VK.spirv_assembly.instruction.compute.conditional_branch.same_labels_true dEQP-VK.spirv_assembly.instruction.compute.conditional_branch.same_labels_false -dEQP-VK.spirv_assembly.instruction.compute.indexing.opaccesschain_u16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opaccesschain_s16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opaccesschain_u64 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opaccesschain_s64 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opinboundsaccesschain_u16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opinboundsaccesschain_s16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opinboundsaccesschain_u64 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opinboundsaccesschain_s64 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opptraccesschain_u16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opptraccesschain_s16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opptraccesschain_u64 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opptraccesschain_s64 dEQP-VK.spirv_assembly.instruction.compute.variable_pointers.compute.reads_opselect_single_buffer dEQP-VK.spirv_assembly.instruction.compute.variable_pointers.compute.reads_opfunctioncall_single_buffer dEQP-VK.spirv_assembly.instruction.compute.variable_pointers.compute.reads_opphi_single_buffer @@ -197996,66 +197984,6 @@ dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_false dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_false_tesse dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_false_geom dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_false_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u16_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u16_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u16_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u16_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u16_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s16_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s16_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s16_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s16_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s16_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u64_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u64_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u64_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u64_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u64_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s64_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s64_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s64_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s64_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s64_frag 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a/external/vulkancts/mustpass/1.1.2/vk-default-no-waivers.txt +++ b/external/vulkancts/mustpass/1.1.2/vk-default-no-waivers.txt @@ -209152,18 +209152,18 @@ dEQP-VK.spirv_assembly.instruction.compute.variable_init.private.floatarray dEQP-VK.spirv_assembly.instruction.compute.variable_init.private.struct dEQP-VK.spirv_assembly.instruction.compute.conditional_branch.same_labels_true dEQP-VK.spirv_assembly.instruction.compute.conditional_branch.same_labels_false -dEQP-VK.spirv_assembly.instruction.compute.indexing.opaccesschain_u16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opaccesschain_s16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opaccesschain_u64 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opaccesschain_s64 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opinboundsaccesschain_u16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opinboundsaccesschain_s16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opinboundsaccesschain_u64 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+dEQP-VK.spirv_assembly.instruction.compute.indexing.input.struct.opinboundsaccesschain_s64 +dEQP-VK.spirv_assembly.instruction.compute.indexing.input.struct.opptraccesschain_u16 +dEQP-VK.spirv_assembly.instruction.compute.indexing.input.struct.opptraccesschain_s16 +dEQP-VK.spirv_assembly.instruction.compute.indexing.input.struct.opptraccesschain_u64 +dEQP-VK.spirv_assembly.instruction.compute.indexing.input.struct.opptraccesschain_s64 dEQP-VK.spirv_assembly.instruction.compute.variable_pointers.compute.reads_opselect_single_buffer dEQP-VK.spirv_assembly.instruction.compute.variable_pointers.compute.reads_opfunctioncall_single_buffer dEQP-VK.spirv_assembly.instruction.compute.variable_pointers.compute.reads_opphi_single_buffer @@ -211950,66 +211950,71 @@ dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_false dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_false_tesse dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_false_geom dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_false_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u16_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u16_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u16_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u16_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_u16_frag -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s16_vert -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s16_tessc -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s16_tesse -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s16_geom -dEQP-VK.spirv_assembly.instruction.graphics.indexing.opaccesschain_s16_frag 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+dEQP-VK.spirv_assembly.instruction.graphics.indexing.input.struct.opptraccesschain_s64_frag +dEQP-VK.spirv_assembly.instruction.graphics.indexing.output.component_vert +dEQP-VK.spirv_assembly.instruction.graphics.indexing.output.component_tessc +dEQP-VK.spirv_assembly.instruction.graphics.indexing.output.component_tesse +dEQP-VK.spirv_assembly.instruction.graphics.indexing.output.component_geom +dEQP-VK.spirv_assembly.instruction.graphics.indexing.output.component_frag dEQP-VK.spirv_assembly.instruction.graphics.variable_pointers.graphics.reads_opselect_single_buffer_vert dEQP-VK.spirv_assembly.instruction.graphics.variable_pointers.graphics.reads_opselect_single_buffer_tessc dEQP-VK.spirv_assembly.instruction.graphics.variable_pointers.graphics.reads_opselect_single_buffer_tesse diff --git a/external/vulkancts/mustpass/1.1.2/vk-default.txt b/external/vulkancts/mustpass/1.1.2/vk-default.txt index 6912468..8a79d09 100644 --- a/external/vulkancts/mustpass/1.1.2/vk-default.txt +++ b/external/vulkancts/mustpass/1.1.2/vk-default.txt @@ -209152,18 +209152,18 @@ dEQP-VK.spirv_assembly.instruction.compute.variable_init.private.floatarray dEQP-VK.spirv_assembly.instruction.compute.variable_init.private.struct dEQP-VK.spirv_assembly.instruction.compute.conditional_branch.same_labels_true dEQP-VK.spirv_assembly.instruction.compute.conditional_branch.same_labels_false -dEQP-VK.spirv_assembly.instruction.compute.indexing.opaccesschain_u16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opaccesschain_s16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opaccesschain_u64 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opaccesschain_s64 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opinboundsaccesschain_u16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opinboundsaccesschain_s16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opinboundsaccesschain_u64 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opinboundsaccesschain_s64 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opptraccesschain_u16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opptraccesschain_s16 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opptraccesschain_u64 -dEQP-VK.spirv_assembly.instruction.compute.indexing.opptraccesschain_s64 +dEQP-VK.spirv_assembly.instruction.compute.indexing.input.struct.opaccesschain_u16 +dEQP-VK.spirv_assembly.instruction.compute.indexing.input.struct.opaccesschain_s16 +dEQP-VK.spirv_assembly.instruction.compute.indexing.input.struct.opaccesschain_u64 +dEQP-VK.spirv_assembly.instruction.compute.indexing.input.struct.opaccesschain_s64 +dEQP-VK.spirv_assembly.instruction.compute.indexing.input.struct.opinboundsaccesschain_u16 +dEQP-VK.spirv_assembly.instruction.compute.indexing.input.struct.opinboundsaccesschain_s16 +dEQP-VK.spirv_assembly.instruction.compute.indexing.input.struct.opinboundsaccesschain_u64 +dEQP-VK.spirv_assembly.instruction.compute.indexing.input.struct.opinboundsaccesschain_s64 +dEQP-VK.spirv_assembly.instruction.compute.indexing.input.struct.opptraccesschain_u16 +dEQP-VK.spirv_assembly.instruction.compute.indexing.input.struct.opptraccesschain_s16 +dEQP-VK.spirv_assembly.instruction.compute.indexing.input.struct.opptraccesschain_u64 +dEQP-VK.spirv_assembly.instruction.compute.indexing.input.struct.opptraccesschain_s64 dEQP-VK.spirv_assembly.instruction.compute.variable_pointers.compute.reads_opselect_single_buffer dEQP-VK.spirv_assembly.instruction.compute.variable_pointers.compute.reads_opfunctioncall_single_buffer dEQP-VK.spirv_assembly.instruction.compute.variable_pointers.compute.reads_opphi_single_buffer @@ -211950,66 +211950,71 @@ dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_false dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_false_tesse dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_false_geom 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+dEQP-VK.spirv_assembly.instruction.graphics.indexing.output.component_vert +dEQP-VK.spirv_assembly.instruction.graphics.indexing.output.component_tessc +dEQP-VK.spirv_assembly.instruction.graphics.indexing.output.component_tesse +dEQP-VK.spirv_assembly.instruction.graphics.indexing.output.component_geom +dEQP-VK.spirv_assembly.instruction.graphics.indexing.output.component_frag dEQP-VK.spirv_assembly.instruction.graphics.variable_pointers.graphics.reads_opselect_single_buffer_vert dEQP-VK.spirv_assembly.instruction.graphics.variable_pointers.graphics.reads_opselect_single_buffer_tessc dEQP-VK.spirv_assembly.instruction.graphics.variable_pointers.graphics.reads_opselect_single_buffer_tesse -- 2.7.4