From c54bb135aad025cad747dedb75541474505c28ae Mon Sep 17 00:00:00 2001 From: Aaron Liu Date: Thu, 17 Sep 2020 16:03:15 +0800 Subject: [PATCH] amd: add Yellow Carp support MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Signed-off-by: Aaron Liu Signed-off-by: Marek Olšák Acked-by: Samuel Pitoiset Part-of: --- src/amd/addrlib/src/amdgpu_asic_addr.h | 6 ++++++ src/amd/addrlib/src/core/addrlib.cpp | 1 + src/amd/addrlib/src/gfx10/gfx10addrlib.cpp | 14 ++++++++++++++ src/amd/common/ac_gpu_info.c | 7 ++++++- src/amd/common/amd_family.c | 2 ++ src/amd/common/amd_family.h | 1 + src/amd/llvm/ac_llvm_util.c | 1 + src/gallium/drivers/radeon/radeon_vcn_dec.c | 1 + src/gallium/drivers/radeonsi/si_get.c | 3 +++ 9 files changed, 35 insertions(+), 1 deletion(-) diff --git a/src/amd/addrlib/src/amdgpu_asic_addr.h b/src/amd/addrlib/src/amdgpu_asic_addr.h index 88dcfbd..cace1dc 100644 --- a/src/amd/addrlib/src/amdgpu_asic_addr.h +++ b/src/amd/addrlib/src/amdgpu_asic_addr.h @@ -45,6 +45,7 @@ #define FAMILY_RV 0x8E #define FAMILY_NV 0x8F #define FAMILY_VGH 0x90 +#define FAMILY_YC 0x92 // AMDGPU_FAMILY_IS(familyId, familyName) #define FAMILY_IS(f, fn) (f == FAMILY_##fn) @@ -58,6 +59,7 @@ #define FAMILY_IS_AI(f) FAMILY_IS(f, AI) #define FAMILY_IS_RV(f) FAMILY_IS(f, RV) #define FAMILY_IS_NV(f) FAMILY_IS(f, NV) +#define FAMILY_IS_YC(f) FAMILY_IS(f, YC) #define AMDGPU_UNKNOWN 0xFF @@ -105,6 +107,8 @@ #define AMDGPU_VANGOGH_RANGE 0x01, 0xFF +#define AMDGPU_YELLOW_CARP_RANGE 0x01, 0xFF + #define AMDGPU_EXPAND_FIX(x) x #define AMDGPU_RANGE_HELPER(val, min, max) ((val >= min) && (val < max)) #define AMDGPU_IN_RANGE(val, ...) AMDGPU_EXPAND_FIX(AMDGPU_RANGE_HELPER(val, __VA_ARGS__)) @@ -159,4 +163,6 @@ #define ASICREV_IS_VANGOGH(r) ASICREV_IS(r, VANGOGH) +#define ASICREV_IS_YELLOW_CARP(r) ASICREV_IS(r, YELLOW_CARP) + #endif // _AMDGPU_ASIC_ADDR_H diff --git a/src/amd/addrlib/src/core/addrlib.cpp b/src/amd/addrlib/src/core/addrlib.cpp index 7a37a4b..1ab885d 100644 --- a/src/amd/addrlib/src/core/addrlib.cpp +++ b/src/amd/addrlib/src/core/addrlib.cpp @@ -228,6 +228,7 @@ ADDR_E_RETURNCODE Lib::Create( break; case FAMILY_NV: case FAMILY_VGH: + case FAMILY_YC: pLib = Gfx10HwlInit(&client); break; default: diff --git a/src/amd/addrlib/src/gfx10/gfx10addrlib.cpp b/src/amd/addrlib/src/gfx10/gfx10addrlib.cpp index a7ebca2..0ae6e09 100644 --- a/src/amd/addrlib/src/gfx10/gfx10addrlib.cpp +++ b/src/amd/addrlib/src/gfx10/gfx10addrlib.cpp @@ -1057,6 +1057,20 @@ ChipFamily Gfx10Lib::HwlConvertChipFamily( { ADDR_ASSERT(!"Unknown chip revision"); } + + break; + + case FAMILY_YC: + if (ASICREV_IS_YELLOW_CARP(chipRevision)) + { + m_settings.supportRbPlus = 1; + m_settings.dccUnsup3DSwDis = 0; + } + else + { + ADDR_ASSERT(!"Unknown chip revision"); + } + break; default: diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c index c4a5bf4..4280113 100644 --- a/src/amd/common/ac_gpu_info.c +++ b/src/amd/common/ac_gpu_info.c @@ -624,6 +624,9 @@ bool ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info, case FAMILY_VGH: identify_chip(VANGOGH); break; + case FAMILY_YC: + identify_chip(YELLOW_CARP); + break; } if (!info->name) { @@ -885,7 +888,8 @@ bool ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info, * DCC is enabled (ie. WRITE_COMPRESS_ENABLE should be 0). */ info->has_image_load_dcc_bug = info->family == CHIP_DIMGREY_CAVEFISH || - info->family == CHIP_VANGOGH; + info->family == CHIP_VANGOGH || + info->family == CHIP_YELLOW_CARP; /* DB has a bug when ITERATE_256 is set to 1 that can cause a hang. The * workaround is to set DECOMPRESS_ON_Z_PLANES to 2 for 4X MSAA D/S images. @@ -1011,6 +1015,7 @@ bool ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info, pc_lines = 512; break; case CHIP_VANGOGH: + case CHIP_YELLOW_CARP: pc_lines = 256; break; default: diff --git a/src/amd/common/amd_family.c b/src/amd/common/amd_family.c index 801cce1..8fd802b 100644 --- a/src/amd/common/amd_family.c +++ b/src/amd/common/amd_family.c @@ -96,6 +96,8 @@ const char *ac_get_family_name(enum radeon_family family) return "dimgrey_cavefish"; case CHIP_VANGOGH: return "vangogh"; + case CHIP_YELLOW_CARP: + return "yellow_carp"; default: unreachable("Unknown GPU family"); } diff --git a/src/amd/common/amd_family.h b/src/amd/common/amd_family.h index 31ec0fb..7f8a788 100644 --- a/src/amd/common/amd_family.h +++ b/src/amd/common/amd_family.h @@ -112,6 +112,7 @@ enum radeon_family CHIP_NAVY_FLOUNDER, CHIP_VANGOGH, CHIP_DIMGREY_CAVEFISH, + CHIP_YELLOW_CARP, CHIP_LAST, }; diff --git a/src/amd/llvm/ac_llvm_util.c b/src/amd/llvm/ac_llvm_util.c index c684200..9deeb91 100644 --- a/src/amd/llvm/ac_llvm_util.c +++ b/src/amd/llvm/ac_llvm_util.c @@ -174,6 +174,7 @@ const char *ac_get_llvm_processor_name(enum radeon_family family) case CHIP_NAVY_FLOUNDER: case CHIP_DIMGREY_CAVEFISH: case CHIP_VANGOGH: + case CHIP_YELLOW_CARP: return "gfx1030"; default: return ""; diff --git a/src/gallium/drivers/radeon/radeon_vcn_dec.c b/src/gallium/drivers/radeon/radeon_vcn_dec.c index 569f57d..438ec89 100644 --- a/src/gallium/drivers/radeon/radeon_vcn_dec.c +++ b/src/gallium/drivers/radeon/radeon_vcn_dec.c @@ -2456,6 +2456,7 @@ struct pipe_video_codec *radeon_create_decoder(struct pipe_context *context, case CHIP_NAVY_FLOUNDER: case CHIP_DIMGREY_CAVEFISH: case CHIP_VANGOGH: + case CHIP_YELLOW_CARP: dec->reg.data0 = RDECODE_VCN2_5_GPCOM_VCPU_DATA0; dec->reg.data1 = RDECODE_VCN2_5_GPCOM_VCPU_DATA1; dec->reg.cmd = RDECODE_VCN2_5_GPCOM_VCPU_CMD; diff --git a/src/gallium/drivers/radeonsi/si_get.c b/src/gallium/drivers/radeonsi/si_get.c index 13f06ea..c5b7edd 100644 --- a/src/gallium/drivers/radeonsi/si_get.c +++ b/src/gallium/drivers/radeonsi/si_get.c @@ -551,6 +551,9 @@ static int si_get_video_param(struct pipe_screen *screen, enum pipe_video_profil switch (param) { case PIPE_VIDEO_CAP_SUPPORTED: + if (codec < PIPE_VIDEO_FORMAT_MPEG4_AVC && + sscreen->info.family >= CHIP_YELLOW_CARP) + return false; switch (codec) { case PIPE_VIDEO_FORMAT_MPEG12: return profile != PIPE_VIDEO_PROFILE_MPEG1; -- 2.7.4