From c3a47221e053a9a0697d27fc3701f29d4058e065 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Mon, 3 Feb 2020 20:07:06 -0800 Subject: [PATCH] [X86] Don't emit two X86ISD::COMI/UCOMI nodes when handling comi/ucomi intrinsics. We were creating two with different operand orders, and then only using one of them. Instead just swap the operands when needed and create a single node. --- llvm/lib/Target/X86/X86ISelLowering.cpp | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 7369427..16615d6 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -24046,8 +24046,11 @@ SDValue X86TargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, ISD::CondCode CC = (ISD::CondCode)IntrData->Opc1; SDValue LHS = Op.getOperand(1); SDValue RHS = Op.getOperand(2); + // Some conditions require the operands to be swapped. + if (CC == ISD::SETLT || CC == ISD::SETLE) + std::swap(LHS, RHS); + SDValue Comi = DAG.getNode(IntrData->Opc0, dl, MVT::i32, LHS, RHS); - SDValue InvComi = DAG.getNode(IntrData->Opc0, dl, MVT::i32, RHS, LHS); SDValue SetCC; switch (CC) { case ISD::SETEQ: { // (ZF = 0 and PF = 0) @@ -24063,18 +24066,14 @@ SDValue X86TargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, break; } case ISD::SETGT: // (CF = 0 and ZF = 0) + case ISD::SETLT: { // Condition opposite to GT. Operands swapped above. SetCC = getSETCC(X86::COND_A, Comi, dl, DAG); break; - case ISD::SETLT: { // The condition is opposite to GT. Swap the operands. - SetCC = getSETCC(X86::COND_A, InvComi, dl, DAG); - break; } case ISD::SETGE: // CF = 0 + case ISD::SETLE: // Condition opposite to GE. Operands swapped above. SetCC = getSETCC(X86::COND_AE, Comi, dl, DAG); break; - case ISD::SETLE: // The condition is opposite to GE. Swap the operands. - SetCC = getSETCC(X86::COND_AE, InvComi, dl, DAG); - break; default: llvm_unreachable("Unexpected illegal condition!"); } -- 2.7.4