From c3479b10e236b0ff0c0671e7333283159c2c5014 Mon Sep 17 00:00:00 2001 From: dj Date: Fri, 1 Feb 2002 21:54:39 +0000 Subject: [PATCH] * config/sparc/sparc.c (sparc_emit_set_symbolic_const64): If we are given conflicting registers, switch to the other one we had allocated for us. * config/sparc/sparc.md (reload_indi, reload_outdi): Pass op[2] as TImode so we know when the "other" register is available. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@49412 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog | 8 ++++++++ gcc/config/sparc/sparc.c | 38 +++++++++++++++++++++++++++----------- gcc/config/sparc/sparc.md | 6 ++---- 3 files changed, 37 insertions(+), 15 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 09a5626..bdb406a 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2002-02-01 DJ Delorie + + * config/sparc/sparc.c (sparc_emit_set_symbolic_const64): If + we are given conflicting registers, switch to the other one we + had allocated for us. + * config/sparc/sparc.md (reload_indi, reload_outdi): Pass op[2] + as TImode so we know when the "other" register is available. + 2002-02-01 David O'Brien * config/sparc/sol2-sld-64.h: Include sparc/biarch64.h rather than diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c index 8cc4449..c5b64a7 100644 --- a/gcc/config/sparc/sparc.c +++ b/gcc/config/sparc/sparc.c @@ -1366,6 +1366,14 @@ sparc_emit_set_symbolic_const64 (op0, op1, temp1) rtx op1; rtx temp1; { + rtx ti_temp1 = 0; + + if (temp1 && GET_MODE (temp1) == TImode) + { + ti_temp1 = temp1; + temp1 = gen_rtx_REG (DImode, REGNO (temp1)); + } + switch (sparc_cmodel) { case CM_MEDLOW: @@ -1419,12 +1427,16 @@ sparc_emit_set_symbolic_const64 (op0, op1, temp1) sllx %temp3, 32, %temp5 or %temp4, %temp5, %reg */ - /* Getting this right wrt. reloading is really tricky. - We _MUST_ have a separate temporary at this point, - if we don't barf immediately instead of generating - incorrect code. */ + /* It is possible that one of the registers we got for operands[2] + might coincide with that of operands[0] (which is why we made + it TImode). Pick the other one to use as our scratch. */ if (rtx_equal_p (temp1, op0)) - abort (); + { + if (ti_temp1) + temp1 = gen_rtx_REG (DImode, REGNO (temp1) + 1); + else + abort(); + } emit_insn (gen_sethh (op0, op1)); emit_insn (gen_setlm (temp1, op1)); @@ -1462,12 +1474,16 @@ sparc_emit_set_symbolic_const64 (op0, op1, temp1) } else { - /* Getting this right wrt. reloading is really tricky. - We _MUST_ have a separate temporary at this point, - so we barf immediately instead of generating - incorrect code. */ - if (temp1 == op0) - abort (); + /* It is possible that one of the registers we got for operands[2] + might coincide with that of operands[0] (which is why we made + it TImode). Pick the other one to use as our scratch. */ + if (rtx_equal_p (temp1, op0)) + { + if (ti_temp1) + temp1 = gen_rtx_REG (DImode, REGNO (temp1) + 1); + else + abort(); + } emit_insn (gen_embmedany_textuhi (op0, op1)); emit_insn (gen_embmedany_texthi (temp1, op1)); diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md index c0b8f60..1969757 100644 --- a/gcc/config/sparc/sparc.md +++ b/gcc/config/sparc/sparc.md @@ -2734,8 +2734,7 @@ && ! flag_pic" " { - sparc_emit_set_symbolic_const64 (operands[0], operands[1], - gen_rtx_REG (DImode, REGNO (operands[2]))); + sparc_emit_set_symbolic_const64 (operands[0], operands[1], operands[2]); DONE; }") @@ -2748,8 +2747,7 @@ && ! flag_pic" " { - sparc_emit_set_symbolic_const64 (operands[0], operands[1], - gen_rtx_REG (DImode, REGNO (operands[2]))); + sparc_emit_set_symbolic_const64 (operands[0], operands[1], operands[2]); DONE; }") -- 2.7.4