From c340956e4efce204c885ab7aad94b74d9255f3a9 Mon Sep 17 00:00:00 2001 From: OCHyams Date: Fri, 10 Feb 2023 09:20:53 +0000 Subject: [PATCH] [NFC][Assignment Tracking] Remove lifetime intrinsics from some tests The intrinsics don't add anything to the tests and the tests are easier to debug without the additional noise. Some SSA value names have changed as a result of no longer visiting the intrinsics. Reviewed By: jryans Differential Revision: https://reviews.llvm.org/D143141 --- .../Generic/assignment-tracking/sroa/frag-2.ll | 20 ++------------------ .../Generic/assignment-tracking/sroa/store.ll | 21 ++++----------------- .../Generic/assignment-tracking/sroa/user-memcpy.ll | 16 +++++----------- .../Generic/assignment-tracking/sroa/vec-1.ll | 4 ---- .../Generic/assignment-tracking/sroa/vec-2.ll | 10 +--------- 5 files changed, 12 insertions(+), 59 deletions(-) diff --git a/llvm/test/DebugInfo/Generic/assignment-tracking/sroa/frag-2.ll b/llvm/test/DebugInfo/Generic/assignment-tracking/sroa/frag-2.ll index d2e74b7..a6dba66 100644 --- a/llvm/test/DebugInfo/Generic/assignment-tracking/sroa/frag-2.ll +++ b/llvm/test/DebugInfo/Generic/assignment-tracking/sroa/frag-2.ll @@ -38,9 +38,9 @@ ; CHECK: call void @_ZN1h1iEv(ptr nonnull sret(%class.B) align 4 %m, ; CHECK: store <2 x float> %agg.tmp.sroa.0.0.copyload.i, ptr %4, align 4,{{.+}}!DIAssignID ![[id1:[0-9]+]] -; CHECK: store <2 x float> %agg.tmp.sroa.2.0.copyload.i, ptr %n.sroa.4.4..sroa_idx, align 4,{{.+}}!DIAssignID ![[id2:[0-9]+]] +; CHECK: store <2 x float> %agg.tmp.sroa.2.0.copyload.i, ptr %n.sroa.2.4..sroa_idx, align 4,{{.+}}!DIAssignID ![[id2:[0-9]+]] ; CHECK-NEXT: call void @llvm.dbg.assign(metadata <2 x float> %agg.tmp.sroa.0.0.copyload.i, metadata ![[var:[0-9]+]], metadata !DIExpression(DW_OP_LLVM_fragment, 0, 64), metadata ![[id1]], metadata ptr %4, metadata !DIExpression()), !dbg -; CHECK-NEXT: call void @llvm.dbg.assign(metadata <2 x float> %agg.tmp.sroa.2.0.copyload.i, metadata ![[var]], metadata !DIExpression(DW_OP_LLVM_fragment, 64, 64), metadata ![[id2]], metadata ptr %n.sroa.4.4..sroa_idx, metadata !DIExpression()), !dbg +; CHECK-NEXT: call void @llvm.dbg.assign(metadata <2 x float> %agg.tmp.sroa.2.0.copyload.i, metadata ![[var]], metadata !DIExpression(DW_OP_LLVM_fragment, 64, 64), metadata ![[id2]], metadata ptr %n.sroa.2.4..sroa_idx, metadata !DIExpression()), !dbg ; CHECK: ret @@ -104,17 +104,12 @@ entry: %o = alloca %class.a, align 4, !DIAssignID !79 call void @llvm.dbg.assign(metadata i1 undef, metadata !72, metadata !DIExpression(), metadata !79, metadata ptr %o, metadata !DIExpression()), !dbg !74 %0 = getelementptr inbounds %class.h, ptr %convexbody, i64 0, i32 0, !dbg !80 - call void @llvm.lifetime.start.p0i8(i64 1, ptr nonnull %0) #7, !dbg !80 %1 = getelementptr inbounds %class.h, ptr %k, i64 0, i32 0, !dbg !80 - call void @llvm.lifetime.start.p0i8(i64 1, ptr nonnull %1) #7, !dbg !80 %2 = bitcast ptr %l to ptr, !dbg !81 - call void @llvm.lifetime.start.p0i8(i64 20, ptr nonnull %2) #7, !dbg !81 call void @_ZN1h1iEv(ptr nonnull sret(%class.B) align 4 %l, ptr nonnull %k), !dbg !82 %3 = bitcast ptr %m to ptr, !dbg !81 - call void @llvm.lifetime.start.p0i8(i64 20, ptr nonnull %3) #7, !dbg !81 call void @_ZN1h1iEv(ptr nonnull sret(%class.B) align 4 %m, ptr nonnull %convexbody), !dbg !83 %4 = bitcast ptr %n to ptr, !dbg !81 - call void @llvm.lifetime.start.p0i8(i64 20, ptr nonnull %4) #7, !dbg !81 %agg.tmp.sroa.0.0..sroa_idx.i = getelementptr inbounds %class.B, ptr %l, i64 0, i32 1, !dbg !84 %agg.tmp.sroa.0.0..sroa_cast.i = bitcast ptr %agg.tmp.sroa.0.0..sroa_idx.i to ptr, !dbg !84 %agg.tmp.sroa.0.0.copyload.i = load <2 x float>, ptr %agg.tmp.sroa.0.0..sroa_cast.i, align 4, !dbg !84 @@ -128,22 +123,14 @@ entry: %d.sroa.2.0..sroa_cast.i.i = bitcast ptr %d.sroa.2.0..sroa_idx2.i.i to ptr, !dbg !89 store <2 x float> %agg.tmp.sroa.2.0.copyload.i, ptr %d.sroa.2.0..sroa_cast.i.i, align 4, !dbg !89 %5 = bitcast ptr %o to ptr, !dbg !91 - call void @llvm.lifetime.start.p0i8(i64 16, ptr nonnull %5) #7, !dbg !91 %e.i = getelementptr inbounds %class.B, ptr %n, i64 0, i32 1, !dbg !92 %6 = bitcast ptr %e.i to ptr, !dbg !97 call void @llvm.memcpy.p0i8.p0i8.i64(ptr nonnull align 4 dereferenceable(16) %5, ptr nonnull align 4 dereferenceable(16) %6, i64 16, i1 false), !dbg !97, !DIAssignID !98 call void @llvm.dbg.assign(metadata i1 undef, metadata !72, metadata !DIExpression(), metadata !98, metadata ptr %5, metadata !DIExpression()), !dbg !74 call void @_ZN1a1cEv(ptr nonnull %o), !dbg !99 - call void @llvm.lifetime.end.p0i8(i64 16, ptr nonnull %5) #7, !dbg !100 - call void @llvm.lifetime.end.p0i8(i64 20, ptr nonnull %4) #7, !dbg !100 - call void @llvm.lifetime.end.p0i8(i64 20, ptr nonnull %3) #7, !dbg !100 - call void @llvm.lifetime.end.p0i8(i64 20, ptr nonnull %2) #7, !dbg !100 - call void @llvm.lifetime.end.p0i8(i64 1, ptr nonnull %1) #7, !dbg !100 - call void @llvm.lifetime.end.p0i8(i64 1, ptr nonnull %0) #7, !dbg !100 ret void, !dbg !100 } -declare void @llvm.lifetime.start.p0i8(i64 immarg, ptr nocapture) #1 declare dso_local void @_ZN1h1iEv(ptr sret(%class.B) align 4, ptr) local_unnamed_addr #5 ; Function Attrs: nounwind uwtable @@ -155,9 +142,6 @@ entry: declare dso_local void @_ZN1a1cEv(ptr) local_unnamed_addr #5 -; Function Attrs: argmemonly nofree nosync nounwind willreturn -declare void @llvm.lifetime.end.p0i8(i64 immarg, ptr nocapture) #1 - !llvm.dbg.cu = !{!0} !llvm.module.flags = !{!3, !4, !5, !1000} !llvm.ident = !{!6} diff --git a/llvm/test/DebugInfo/Generic/assignment-tracking/sroa/store.ll b/llvm/test/DebugInfo/Generic/assignment-tracking/sroa/store.ll index 3dcfc42..6e5c7e7 100644 --- a/llvm/test/DebugInfo/Generic/assignment-tracking/sroa/store.ll +++ b/llvm/test/DebugInfo/Generic/assignment-tracking/sroa/store.ll @@ -29,19 +29,19 @@ ; CHECK-NEXT: %S.sroa.0 = alloca { i32, i32, i32 }, align 8, !DIAssignID ![[ID_1:[0-9]+]] ; CHECK-NEXT: call void @llvm.dbg.assign(metadata i1 undef, metadata ![[VAR:[0-9]+]], metadata !DIExpression(DW_OP_LLVM_fragment, 0, 96), metadata ![[ID_1]], metadata ptr %S.sroa.0, metadata !DIExpression()), !dbg -; CHECK-NEXT: %S.sroa.6 = alloca { i32, i32, i32 }, align 8, !DIAssignID ![[ID_3:[0-9]+]] -; CHECK-NEXT: call void @llvm.dbg.assign(metadata i1 undef, metadata ![[VAR]], metadata !DIExpression(DW_OP_LLVM_fragment, 128, 96), metadata ![[ID_3]], metadata ptr %S.sroa.6, metadata !DIExpression()), !dbg +; CHECK-NEXT: %S.sroa.4 = alloca { i32, i32, i32 }, align 8, !DIAssignID ![[ID_3:[0-9]+]] +; CHECK-NEXT: call void @llvm.dbg.assign(metadata i1 undef, metadata ![[VAR]], metadata !DIExpression(DW_OP_LLVM_fragment, 128, 96), metadata ![[ID_3]], metadata ptr %S.sroa.4, metadata !DIExpression()), !dbg ;; The memset has been split into [0, 96)[96, 128)[128, 224) bit slices. The ;; memset for the middle slice has been removed. ; CHECK: call void @llvm.memset{{.*}}(ptr align 8 %S.sroa.0, i8 0, i64 12, i1 false), !dbg !{{.+}}, !DIAssignID ![[ID_4:[0-9]+]] -; CHECK-NEXT: call void @llvm.memset{{.*}}(ptr align 8 %S.sroa.6, i8 0, i64 12, i1 false), !dbg !{{.+}}, !DIAssignID ![[ID_5:[0-9]+]] +; CHECK-NEXT: call void @llvm.memset{{.*}}(ptr align 8 %S.sroa.4, i8 0, i64 12, i1 false), !dbg !{{.+}}, !DIAssignID ![[ID_5:[0-9]+]] ; CHECK-NEXT: call void @llvm.dbg.assign(metadata i8 0, metadata ![[VAR]], metadata !DIExpression(DW_OP_LLVM_fragment, 0, 96), metadata ![[ID_4]], metadata ptr %S.sroa.0, metadata !DIExpression()), !dbg ;; This is the one we care about most in this test: check that a memset->store ;; gets a correct dbg.assign. ; CHECK-NEXT: call void @llvm.dbg.assign(metadata i32 0, metadata ![[VAR]], metadata !DIExpression(DW_OP_LLVM_fragment, 96, 32), metadata !{{.+}}, metadata ptr undef, metadata !DIExpression()), !dbg -; CHECK-NEXT: call void @llvm.dbg.assign(metadata i8 0, metadata ![[VAR]], metadata !DIExpression(DW_OP_LLVM_fragment, 128, 96), metadata ![[ID_5]], metadata ptr %S.sroa.6, metadata !DIExpression()), !dbg +; CHECK-NEXT: call void @llvm.dbg.assign(metadata i8 0, metadata ![[VAR]], metadata !DIExpression(DW_OP_LLVM_fragment, 128, 96), metadata ![[ID_5]], metadata ptr %S.sroa.4, metadata !DIExpression()), !dbg ;; The load from global+store becomes a load. ;; FIXME: In reality it is actually stored again later on. @@ -63,7 +63,6 @@ entry: call void @llvm.dbg.assign(metadata i1 undef, metadata !18, metadata !DIExpression(), metadata !28, metadata ptr %S, metadata !DIExpression()), !dbg !29 %agg.tmp = alloca %struct.LargeStruct, align 8 %0 = bitcast ptr %S to ptr, !dbg !30 - call void @llvm.lifetime.start.p0i8(i64 28, ptr %0) #5, !dbg !30 %1 = bitcast ptr %S to ptr, !dbg !31 call void @llvm.memset.p0i8.i64(ptr align 4 %1, i8 0, i64 28, i1 false), !dbg !31, !DIAssignID !32 call void @llvm.dbg.assign(metadata i8 0, metadata !18, metadata !DIExpression(), metadata !32, metadata ptr %1, metadata !DIExpression()), !dbg !31 @@ -78,25 +77,13 @@ entry: %Var1 = getelementptr inbounds %struct.LargeStruct, ptr %S, i32 0, i32 3, !dbg !46 %5 = load i32, ptr %Var1, align 4, !dbg !46 %6 = bitcast ptr %S to ptr, !dbg !47 - call void @llvm.lifetime.end.p0i8(i64 28, ptr %6) #5, !dbg !47 ret i32 %5, !dbg !48 } -; Function Attrs: argmemonly nofree nosync nounwind willreturn -declare void @llvm.lifetime.start.p0i8(i64 immarg, ptr nocapture) #1 -; Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly declare void @llvm.memset.p0i8.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2 - declare !dbg !49 dso_local i32 @_Z3use11LargeStruct(ptr byval(%struct.LargeStruct) align 8) #3 - -; Function Attrs: argmemonly nofree nosync nounwind willreturn declare void @llvm.memcpy.p0i8.p0i8.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #1 - -; Function Attrs: argmemonly nofree nosync nounwind willreturn -declare void @llvm.lifetime.end.p0i8(i64 immarg, ptr nocapture) #1 - -; Function Attrs: nofree nosync nounwind readnone speculatable willreturn declare void @llvm.dbg.assign(metadata, metadata, metadata, metadata, metadata, metadata) #4 !llvm.dbg.cu = !{!2} diff --git a/llvm/test/DebugInfo/Generic/assignment-tracking/sroa/user-memcpy.ll b/llvm/test/DebugInfo/Generic/assignment-tracking/sroa/user-memcpy.ll index 18735d9..a652a29 100644 --- a/llvm/test/DebugInfo/Generic/assignment-tracking/sroa/user-memcpy.ll +++ b/llvm/test/DebugInfo/Generic/assignment-tracking/sroa/user-memcpy.ll @@ -36,11 +36,11 @@ ;; local.other.y = global.other.y ;; local.other.z = global.other.z ; CHECK-NEXT: %other.sroa.0.0.copyload = load i64, ptr @__const._Z3funv.other -; CHECK-NEXT: %other.sroa.4.0.copyload = load i64, ptr getelementptr inbounds (i8, ptr @__const._Z3funv.other, i64 8) -; CHECK-NEXT: %other.sroa.5.0.copyload = load i64, ptr getelementptr inbounds (i8, ptr @__const._Z3funv.other, i64 16) +; CHECK-NEXT: %other.sroa.2.0.copyload = load i64, ptr getelementptr inbounds (i8, ptr @__const._Z3funv.other, i64 8) +; CHECK-NEXT: %other.sroa.3.0.copyload = load i64, ptr getelementptr inbounds (i8, ptr @__const._Z3funv.other, i64 16) ; CHECK-NEXT: call void @llvm.dbg.assign(metadata i64 %other.sroa.0.0.copyload, metadata ![[other:[0-9]+]], metadata !DIExpression(DW_OP_LLVM_fragment, 0, 64), metadata !{{.+}}, metadata ptr undef, metadata !DIExpression()), !dbg -; CHECK-NEXT: call void @llvm.dbg.assign(metadata i64 %other.sroa.4.0.copyload, metadata ![[other]], metadata !DIExpression(DW_OP_LLVM_fragment, 64, 64), metadata !{{.+}}, metadata ptr undef, metadata !DIExpression()), !dbg -; CHECK-NEXT: call void @llvm.dbg.assign(metadata i64 %other.sroa.5.0.copyload, metadata ![[other]], metadata !DIExpression(DW_OP_LLVM_fragment, 128, 64), metadata !{{.+}}, metadata ptr undef, metadata !DIExpression()), !dbg +; CHECK-NEXT: call void @llvm.dbg.assign(metadata i64 %other.sroa.2.0.copyload, metadata ![[other]], metadata !DIExpression(DW_OP_LLVM_fragment, 64, 64), metadata !{{.+}}, metadata ptr undef, metadata !DIExpression()), !dbg +; CHECK-NEXT: call void @llvm.dbg.assign(metadata i64 %other.sroa.3.0.copyload, metadata ![[other]], metadata !DIExpression(DW_OP_LLVM_fragment, 128, 64), metadata !{{.+}}, metadata ptr undef, metadata !DIExpression()), !dbg ;; | std::memcpy(&point.y, &other.x, sizeof(long) * 2); ;; other is now 3 scalars: @@ -48,7 +48,7 @@ ; CHECK-NEXT: call void @llvm.dbg.assign(metadata i64 %other.sroa.0.0.copyload, metadata ![[point]], metadata !DIExpression(DW_OP_LLVM_fragment, 64, 64), metadata !{{.+}}, metadata ptr undef, metadata !DIExpression()), !dbg ;; ;; point.z = other.y -; CHECK-NEXT: call void @llvm.dbg.assign(metadata i64 %other.sroa.4.0.copyload, metadata ![[point]], metadata !DIExpression(DW_OP_LLVM_fragment, 128, 64), metadata !{{.+}}, metadata ptr undef, metadata !DIExpression()), !dbg +; CHECK-NEXT: call void @llvm.dbg.assign(metadata i64 %other.sroa.2.0.copyload, metadata ![[point]], metadata !DIExpression(DW_OP_LLVM_fragment, 128, 64), metadata !{{.+}}, metadata ptr undef, metadata !DIExpression()), !dbg ; CHECK: ![[point]] = !DILocalVariable(name: "point", ; CHECK: ![[other]] = !DILocalVariable(name: "other", @@ -69,7 +69,6 @@ entry: %other = alloca %struct.V3i, align 8, !DIAssignID !114 call void @llvm.dbg.assign(metadata i1 undef, metadata !111, metadata !DIExpression(), metadata !114, metadata ptr %other, metadata !DIExpression()), !dbg !113 %0 = bitcast ptr %point to ptr, !dbg !115 - call void @llvm.lifetime.start.p0i8(i64 24, ptr %0), !dbg !115 %1 = bitcast ptr %point to ptr, !dbg !116 call void @llvm.memset.p0i8.i64(ptr align 8 %1, i8 0, i64 24, i1 false), !dbg !116, !DIAssignID !117 call void @llvm.dbg.assign(metadata i8 0, metadata !104, metadata !DIExpression(), metadata !117, metadata ptr %1, metadata !DIExpression()), !dbg !116 @@ -77,7 +76,6 @@ entry: store i64 5000, ptr %z, align 8, !dbg !119, !DIAssignID !125 call void @llvm.dbg.assign(metadata i64 5000, metadata !104, metadata !DIExpression(DW_OP_LLVM_fragment, 128, 64), metadata !125, metadata ptr %z, metadata !DIExpression()), !dbg !119 %2 = bitcast ptr %other to ptr, !dbg !126 - call void @llvm.lifetime.start.p0i8(i64 24, ptr %2), !dbg !126 %3 = bitcast ptr %other to ptr, !dbg !127 call void @llvm.memcpy.p0i8.p0i8.i64(ptr align 8 %3, ptr align 8 bitcast (ptr @__const._Z3funv.other to ptr), i64 24, i1 false), !dbg !127, !DIAssignID !128 call void @llvm.dbg.assign(metadata i1 undef, metadata !111, metadata !DIExpression(), metadata !128, metadata ptr %3, metadata !DIExpression()), !dbg !127 @@ -88,16 +86,12 @@ entry: call void @llvm.memcpy.p0i8.p0i8.i64(ptr align 8 %4, ptr align 8 %5, i64 16, i1 false), !dbg !130, !DIAssignID !132 call void @llvm.dbg.assign(metadata i1 undef, metadata !104, metadata !DIExpression(DW_OP_LLVM_fragment, 64, 128), metadata !132, metadata ptr %4, metadata !DIExpression()), !dbg !130 %6 = bitcast ptr %other to ptr, !dbg !133 - call void @llvm.lifetime.end.p0i8(i64 24, ptr %6), !dbg !133 %7 = bitcast ptr %point to ptr, !dbg !133 - call void @llvm.lifetime.end.p0i8(i64 24, ptr %7), !dbg !133 ret void, !dbg !133 } -declare void @llvm.lifetime.start.p0i8(i64 immarg, ptr nocapture) declare void @llvm.memset.p0i8.i64(ptr nocapture writeonly, i8, i64, i1 immarg) declare void @llvm.memcpy.p0i8.p0i8.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) -declare void @llvm.lifetime.end.p0i8(i64 immarg, ptr nocapture) declare void @llvm.dbg.assign(metadata, metadata, metadata, metadata, metadata, metadata) !llvm.dbg.cu = !{!0} diff --git a/llvm/test/DebugInfo/Generic/assignment-tracking/sroa/vec-1.ll b/llvm/test/DebugInfo/Generic/assignment-tracking/sroa/vec-1.ll index a63aa90..421838b 100644 --- a/llvm/test/DebugInfo/Generic/assignment-tracking/sroa/vec-1.ll +++ b/llvm/test/DebugInfo/Generic/assignment-tracking/sroa/vec-1.ll @@ -36,7 +36,6 @@ entry: call void @llvm.dbg.assign(metadata ptr %this, metadata !26, metadata !DIExpression(), metadata !36, metadata ptr %this.addr, metadata !DIExpression()), !dbg !30 %this1 = load ptr, ptr %this.addr, align 8 %0 = bitcast ptr %e to ptr, !dbg !37 - call void @llvm.lifetime.start.p0i8(i64 16, ptr %0) #4, !dbg !37 %call = call { <2 x float>, <2 x float> } @_ZNK1c5m_fn1Ev(ptr %this1), !dbg !38 %coerce.dive = getelementptr inbounds %class.a, ptr %e, i32 0, i32 0, !dbg !38 %1 = bitcast ptr %coerce.dive to ptr, !dbg !38 @@ -49,14 +48,11 @@ entry: store <2 x float> %5, ptr %4, align 4, !dbg !38, !DIAssignID !40 call void @llvm.dbg.assign(metadata <2 x float> %5, metadata !28, metadata !DIExpression(DW_OP_LLVM_fragment, 64, 64), metadata !40, metadata ptr %4, metadata !DIExpression()), !dbg !30 %6 = bitcast ptr %e to ptr, !dbg !41 - call void @llvm.lifetime.end.p0i8(i64 16, ptr %6) #4, !dbg !41 ret void, !dbg !41 } declare void @llvm.dbg.declare(metadata, metadata, metadata) #1 -declare void @llvm.lifetime.start.p0i8(i64 immarg, ptr nocapture) #2 declare dso_local { <2 x float>, <2 x float> } @_ZNK1c5m_fn1Ev(ptr) #3 -declare void @llvm.lifetime.end.p0i8(i64 immarg, ptr nocapture) #2 declare void @llvm.dbg.assign(metadata, metadata, metadata, metadata, metadata, metadata) #1 diff --git a/llvm/test/DebugInfo/Generic/assignment-tracking/sroa/vec-2.ll b/llvm/test/DebugInfo/Generic/assignment-tracking/sroa/vec-2.ll index 699d4dd..e8ec4dc 100644 --- a/llvm/test/DebugInfo/Generic/assignment-tracking/sroa/vec-2.ll +++ b/llvm/test/DebugInfo/Generic/assignment-tracking/sroa/vec-2.ll @@ -26,7 +26,7 @@ ;; dbg.assign/DIExpression. Ensure that only the value-expression gets fragment ;; info; that the address-expression remains untouched. -; CHECK: %i.sroa.4.12.vec.insert = insertelement <2 x float> %i.sroa.4.0.vec.insert, float %2, i32 1, !dbg +; CHECK: %i.sroa.2.12.vec.insert = insertelement <2 x float> %i.sroa.2.0.vec.insert, float %2, i32 1, !dbg ;; There's a few dbg intrinsics we're not interested in testing wedged in here. ; CHECK-NEXT: dbg.value ; CHECK-NEXT: dbg.assign @@ -60,7 +60,6 @@ entry: call void @llvm.dbg.assign(metadata <2 x float> %0, metadata !30, metadata !DIExpression(DW_OP_LLVM_fragment, 0, 64), metadata !41, metadata ptr undef, metadata !DIExpression()), !dbg !33 call void @llvm.dbg.assign(metadata <2 x float> %1, metadata !30, metadata !DIExpression(DW_OP_LLVM_fragment, 64, 64), metadata !42, metadata ptr undef, metadata !DIExpression()), !dbg !33 %2 = bitcast ptr %i to ptr, !dbg !43 - call void @llvm.lifetime.start.p0i8(i64 16, ptr nonnull %2) #5, !dbg !43 %h.sroa.0.sroa.0.0.h.sroa.0.0..sroa_cast4.sroa_cast = bitcast ptr %i to ptr, !dbg !44 store <2 x float> %0, ptr %h.sroa.0.sroa.0.0.h.sroa.0.0..sroa_cast4.sroa_cast, align 8, !dbg !44, !DIAssignID !45 call void @llvm.dbg.assign(metadata <2 x float> %0, metadata !31, metadata !DIExpression(DW_OP_LLVM_fragment, 0, 64), metadata !45, metadata ptr %h.sroa.0.sroa.0.0.h.sroa.0.0..sroa_cast4.sroa_cast, metadata !DIExpression()), !dbg !33 @@ -71,7 +70,6 @@ entry: call void @llvm.dbg.assign(metadata i1 undef, metadata !47, metadata !DIExpression(), metadata !51, metadata ptr undef, metadata !DIExpression()), !dbg !52 call void @llvm.dbg.assign(metadata ptr %i, metadata !47, metadata !DIExpression(), metadata !54, metadata ptr undef, metadata !DIExpression()), !dbg !52 %3 = bitcast ptr %ref.tmp to ptr, !dbg !55 - call void @llvm.lifetime.start.p0i8(i64 16, ptr nonnull %3) #5, !dbg !55 call void @llvm.dbg.assign(metadata i1 undef, metadata !56, metadata !DIExpression(), metadata !59, metadata ptr undef, metadata !DIExpression()), !dbg !60 call void @llvm.dbg.assign(metadata ptr %ref.tmp, metadata !56, metadata !DIExpression(), metadata !62, metadata ptr undef, metadata !DIExpression()), !dbg !60 %4 = load float, ptr @c, align 4, !dbg !63 @@ -79,14 +77,9 @@ entry: store float %4, ptr %arrayidx.i, align 4, !dbg !70 call void @llvm.memcpy.p0i8.p0i8.i64(ptr nonnull align 8 dereferenceable(16) %2, ptr nonnull align 4 dereferenceable(16) %3, i64 16, i1 false), !dbg !71, !DIAssignID !72 call void @llvm.dbg.assign(metadata i1 undef, metadata !31, metadata !DIExpression(), metadata !72, metadata ptr %2, metadata !DIExpression()), !dbg !33 - call void @llvm.lifetime.end.p0i8(i64 16, ptr nonnull %3) #5, !dbg !73 - call void @llvm.lifetime.end.p0i8(i64 16, ptr nonnull %2) #5, !dbg !74 ret void, !dbg !74 } -; Function Attrs: argmemonly nofree nosync nounwind willreturn -declare void @llvm.lifetime.start.p0i8(i64 immarg, ptr nocapture) #1 - declare !dbg !75 dso_local { <2 x float>, <2 x float> } @_Z1fv() local_unnamed_addr #2 ; Function Attrs: argmemonly nofree nosync nounwind willreturn @@ -111,7 +104,6 @@ entry: ret void, !dbg !88 } -declare void @llvm.lifetime.end.p0i8(i64 immarg, ptr nocapture) #1 declare void @llvm.dbg.assign(metadata, metadata, metadata, metadata, metadata, metadata) #4 !llvm.dbg.cu = !{!2} -- 2.7.4