From c2c59456e1fcad3f464761c5839399176e3a934a Mon Sep 17 00:00:00 2001 From: Miles Chen Date: Fri, 4 Sep 2020 18:40:38 +0800 Subject: [PATCH] iommu/mediatek: Check 4GB mode by reading infracfg In previous discussion [1] and [2], we found that it is risky to use max_pfn or totalram_pages to tell if 4GB mode is enabled. Check 4GB mode by reading infracfg register, remove the usage of the un-exported symbol max_pfn. This is a step towards building mtk_iommu as a kernel module. [1] https://lore.kernel.org/lkml/20200603161132.2441-1-miles.chen@mediatek.com/ [2] https://lore.kernel.org/lkml/20200604080120.2628-1-miles.chen@mediatek.com/ [3] https://lore.kernel.org/lkml/20200715205120.GA778876@bogus/ Cc: Mike Rapoport Cc: David Hildenbrand Cc: Yong Wu Cc: Yingjoe Chen Cc: Christoph Hellwig Cc: Rob Herring Cc: Matthias Brugger Cc: Joerg Roedel Reviewed-by: Matthias Brugger Signed-off-by: Miles Chen Link: https://lore.kernel.org/r/20200904104038.4979-1-miles.chen@mediatek.com Signed-off-by: Joerg Roedel --- drivers/iommu/mtk_iommu.c | 33 ++++++++++++++++++++++++++++----- include/linux/soc/mediatek/infracfg.h | 3 +++ 2 files changed, 31 insertions(+), 5 deletions(-) diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c index b99c2b4..94f6766 100644 --- a/drivers/iommu/mtk_iommu.c +++ b/drivers/iommu/mtk_iommu.c @@ -3,7 +3,6 @@ * Copyright (c) 2015-2016 MediaTek Inc. * Author: Yong Wu */ -#include #include #include #include @@ -15,13 +14,16 @@ #include #include #include +#include #include #include #include #include #include +#include #include #include +#include #include #include @@ -640,8 +642,11 @@ static int mtk_iommu_probe(struct platform_device *pdev) struct resource *res; resource_size_t ioaddr; struct component_match *match = NULL; + struct regmap *infracfg; void *protect; int i, larb_nr, ret; + u32 val; + char *p; data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); if (!data) @@ -655,10 +660,28 @@ static int mtk_iommu_probe(struct platform_device *pdev) return -ENOMEM; data->protect_base = ALIGN(virt_to_phys(protect), MTK_PROTECT_PA_ALIGN); - /* Whether the current dram is over 4GB */ - data->enable_4GB = !!(max_pfn > (BIT_ULL(32) >> PAGE_SHIFT)); - if (!MTK_IOMMU_HAS_FLAG(data->plat_data, HAS_4GB_MODE)) - data->enable_4GB = false; + if (MTK_IOMMU_HAS_FLAG(data->plat_data, HAS_4GB_MODE)) { + switch (data->plat_data->m4u_plat) { + case M4U_MT2712: + p = "mediatek,mt2712-infracfg"; + break; + case M4U_MT8173: + p = "mediatek,mt8173-infracfg"; + break; + default: + p = NULL; + } + + infracfg = syscon_regmap_lookup_by_compatible(p); + + if (IS_ERR(infracfg)) + return PTR_ERR(infracfg); + + ret = regmap_read(infracfg, REG_INFRA_MISC, &val); + if (ret) + return ret; + data->enable_4GB = !!(val & F_DDR_4GB_SUPPORT_EN); + } res = platform_get_resource(pdev, IORESOURCE_MEM, 0); data->base = devm_ioremap_resource(dev, res); diff --git a/include/linux/soc/mediatek/infracfg.h b/include/linux/soc/mediatek/infracfg.h index fd25f01..233463d 100644 --- a/include/linux/soc/mediatek/infracfg.h +++ b/include/linux/soc/mediatek/infracfg.h @@ -32,6 +32,9 @@ #define MT7622_TOP_AXI_PROT_EN_WB (BIT(2) | BIT(6) | \ BIT(7) | BIT(8)) +#define REG_INFRA_MISC 0xf00 +#define F_DDR_4GB_SUPPORT_EN BIT(13) + int mtk_infracfg_set_bus_protection(struct regmap *infracfg, u32 mask, bool reg_update); int mtk_infracfg_clear_bus_protection(struct regmap *infracfg, u32 mask, -- 2.7.4