From c24ca0e691bd5b8e2e332577a6014de9572b9194 Mon Sep 17 00:00:00 2001 From: H Hartley Sweeten Date: Tue, 4 Nov 2014 10:53:57 -0700 Subject: [PATCH] staging: comedi: addi_apci_3120: tidy up devpriv->ctrl use The apci3120_setup_chan_list() function sets devpriv->ctrl to the scan length (PR) and scan start (PA) values and writes the value to the register. There is no need to mask the value first. The apci3120_ai_insn_read() function calles apci3120_setup_chan_list(). There is no need to clear devpriv->ctrl first or clear any additional bits and write the register again. This also fixes an incorrect use of APCI3120_DISABLE_TIMER0 to disable the timer. apci3120_cyclic_ai() also calls apci3120_setup_chan_list() so it does not need to clear devpriv->ctrl or clear any addidional bits and write the register. Update the comments in apci3120_reset() and apci3120_cancel(). Signed-off-by: H Hartley Sweeten Reviewed-by: Ian Abbott Signed-off-by: Greg Kroah-Hartman --- .../comedi/drivers/addi-data/hwdrv_apci3120.c | 34 ++++------------------ drivers/staging/comedi/drivers/addi_apci_3120.c | 2 ++ 2 files changed, 7 insertions(+), 29 deletions(-) diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3120.c b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3120.c index 4231e99..71fcaa4 100644 --- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3120.c +++ b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3120.c @@ -102,9 +102,6 @@ This program is distributed in the hope that it will be useful, but WITHOUT ANY #define APCI3120_SEQ_RAM_ADDRESS 0x06 #define APCI3120_RESET_FIFO 0x0c #define APCI3120_ENABLE_TIMER0 0x1000 -#define APCI3120_CLEAR_PR 0xf0ff -#define APCI3120_CLEAR_PA 0xfff0 -#define APCI3120_CLEAR_PA_PR (APCI3120_CLEAR_PR & APCI3120_CLEAR_PA) /* nWrMode_Select */ #define APCI3120_ENABLE_SCAN 0x8 @@ -246,9 +243,8 @@ static int apci3120_setup_chan_list(struct comedi_device *dev, if (check) return 1; - /* Code to set the PA and PR...Here it set PA to 0 */ - devpriv->ctrl &= APCI3120_CLEAR_PA_PR; - devpriv->ctrl = ((n_chan - 1) & 0xf) << 8; + /* set scan length (PR) and scan start (PA) */ + devpriv->ctrl = APCI3120_CTRL_PR(n_chan - 1) | APCI3120_CTRL_PA(0); outw(devpriv->ctrl, dev->iobase + APCI3120_WR_ADDRESS); for (i = 0; i < n_chan; i++) { @@ -292,7 +288,6 @@ static int apci3120_ai_insn_read(struct comedi_device *dev, /* Clear software registers */ devpriv->timer_mode = 0; devpriv->b_ModeSelectRegister = 0; - devpriv->ctrl = 0; if (insn->unused[0] == 222) { /* second insn read */ for (i = 0; i < insn->n; i++) @@ -347,7 +342,6 @@ static int apci3120_ai_insn_read(struct comedi_device *dev, dev->iobase + APCI3120_WRITE_MODE_SELECT); /* Sets gate 0 */ - devpriv->ctrl &= APCI3120_CLEAR_PA_PR; devpriv->ctrl |= APCI3120_ENABLE_TIMER0; outw(devpriv->ctrl, dev->iobase + APCI3120_WR_ADDRESS); @@ -380,11 +374,6 @@ static int apci3120_ai_insn_read(struct comedi_device *dev, inw(dev->iobase + 0); /* Clears the FIFO */ inw(dev->iobase + APCI3120_RESET_FIFO); - /* clear PA PR and disable timer 0 */ - - devpriv->ctrl &= APCI3120_CLEAR_PA_PR; - devpriv->ctrl |= APCI3120_DISABLE_TIMER0; - outw(devpriv->ctrl, dev->iobase + APCI3120_WR_ADDRESS); if (!apci3120_setup_chan_list(dev, s, devpriv->ui_AiNbrofChannels, @@ -484,7 +473,7 @@ static int apci3120_reset(struct comedi_device *dev) outb(devpriv->b_ModeSelectRegister, dev->iobase + APCI3120_WRITE_MODE_SELECT); - /* Disables all counters, ext trigger and clears PA, PR */ + /* disable all counters, ext trigger, and reset scan */ devpriv->ctrl = 0; outw(devpriv->ctrl, dev->iobase + APCI3120_WR_ADDRESS); @@ -535,7 +524,7 @@ static int apci3120_cancel(struct comedi_device *dev, /* Disable BUS Master PCI */ outl(0, devpriv->amcc + AMCC_OP_REG_MCSR); - /* stop all counters and disable external trigger */ + /* disable all counters, ext trigger, and reset scan */ devpriv->ctrl = 0; outw(devpriv->ctrl, dev->iobase + APCI3120_WR_ADDRESS); @@ -647,20 +636,12 @@ static int apci3120_cyclic_ai(int mode, /* clear software registers */ devpriv->timer_mode = 0; - devpriv->ctrl = 0; devpriv->b_ModeSelectRegister = 0; /* Clear Timer Write TC int */ outl(APCI3120_CLEAR_WRITE_TC_INT, devpriv->amcc + APCI3120_AMCC_OP_REG_INTCSR); - /* Disables All Timer */ - /* Sets PR and PA to 0 */ - devpriv->ctrl &= APCI3120_DISABLE_TIMER0 & - APCI3120_DISABLE_TIMER1 & - APCI3120_CLEAR_PA_PR; - outw(devpriv->ctrl, dev->iobase + APCI3120_WR_ADDRESS); - /* Resets the FIFO */ /* BEGIN JK 07.05.04: Comparison between WIN32 and Linux driver */ inb(dev->iobase + APCI3120_RESET_FIFO); @@ -728,12 +709,7 @@ static int apci3120_cyclic_ai(int mode, dev->iobase + APCI3120_WRITE_MODE_SELECT); if (cmd->stop_src == TRIG_COUNT) { - /* - * configure Timer2 For counting EOS Reset gate 2 of Timer 2 to - * disable it (Set Bit D14 to 0) - */ - devpriv->ctrl &= APCI3120_DISABLE_TIMER2; - outw(devpriv->ctrl, dev->iobase + APCI3120_WR_ADDRESS); + /* configure Timer2 For counting EOS */ /* DISABLE TIMER intERRUPT */ devpriv->b_ModeSelectRegister = diff --git a/drivers/staging/comedi/drivers/addi_apci_3120.c b/drivers/staging/comedi/drivers/addi_apci_3120.c index e320c08..9778240 100644 --- a/drivers/staging/comedi/drivers/addi_apci_3120.c +++ b/drivers/staging/comedi/drivers/addi_apci_3120.c @@ -15,6 +15,8 @@ /* * PCI BAR 1 register map (dev->iobase) */ +#define APCI3120_CTRL_PR(x) (((x) & 0xf) << 8) +#define APCI3120_CTRL_PA(x) (((x) & 0xf) << 0) #define APCI3120_STATUS_TO_VERSION(x) (((x) >> 4) & 0xf) #define APCI3120_TIMER_REG 0x04 #define APCI3120_AO_REG(x) (0x08 + (((x) / 4) * 2)) -- 2.7.4