From c1dbc563f4a6a6b3438e97a2418922c22c1e77bf Mon Sep 17 00:00:00 2001 From: =?utf8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Fri, 8 Apr 2016 12:15:50 +0200 Subject: [PATCH] radeonsi: set PA_SU_SMALL_PRIM_FILTER_CNTL register on Polaris This was missing. Cc: 12.0 Reviewed-by: Alex Deucher --- src/gallium/drivers/radeonsi/si_state.c | 5 +++++ src/gallium/drivers/radeonsi/sid.h | 6 ++++++ 2 files changed, 11 insertions(+) diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index 2e2c5ca..0a2fdbf 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -3882,6 +3882,11 @@ static void si_init_config(struct si_context *sctx) if (sctx->b.family == CHIP_STONEY) si_pm4_set_reg(pm4, R_028C40_PA_SC_SHADER_CONTROL, 0); + if (sctx->b.family >= CHIP_POLARIS10) + si_pm4_set_reg(pm4, R_028830_PA_SU_SMALL_PRIM_FILTER_CNTL, + S_028830_SMALL_PRIM_FILTER_ENABLE(1) | + S_028830_LINE_FILTER_DISABLE(1)); /* line bug */ + si_pm4_set_reg(pm4, R_028080_TA_BC_BASE_ADDR, border_color_va >> 8); if (sctx->b.chip_class >= CIK) si_pm4_set_reg(pm4, R_028084_TA_BC_BASE_ADDR_HI, border_color_va >> 40); diff --git a/src/gallium/drivers/radeonsi/sid.h b/src/gallium/drivers/radeonsi/sid.h index 1363a44..b973489 100644 --- a/src/gallium/drivers/radeonsi/sid.h +++ b/src/gallium/drivers/radeonsi/sid.h @@ -7215,6 +7215,12 @@ #define G_02882C_YMAX_BOTTOM_EXCLUSION(x) (((x) >> 31) & 0x1) #define C_02882C_YMAX_BOTTOM_EXCLUSION 0x7FFFFFFF /* */ +#define R_028830_PA_SU_SMALL_PRIM_FILTER_CNTL 0x028830 /* Polaris */ +#define S_028830_SMALL_PRIM_FILTER_ENABLE(x) (((x) & 0x1) << 0) +#define S_028830_TRIANGLE_FILTER_DISABLE(x) (((x) & 0x1) << 1) +#define S_028830_LINE_FILTER_DISABLE(x) (((x) & 0x1) << 2) +#define S_028830_POINT_FILTER_DISABLE(x) (((x) & 0x1) << 3) +#define S_028830_RECTANGLE_FILTER_DISABLE(x) (((x) & 0x1) << 4) #define R_028A00_PA_SU_POINT_SIZE 0x028A00 #define S_028A00_HEIGHT(x) (((unsigned)(x) & 0xFFFF) << 0) #define G_028A00_HEIGHT(x) (((x) >> 0) & 0xFFFF) -- 2.7.4