From c1cd61e02add90ab79b8e4abeb0514d881735870 Mon Sep 17 00:00:00 2001 From: Guillaume Chatelet Date: Tue, 30 Jun 2020 13:12:31 +0000 Subject: [PATCH] [Alignment][NFC] Migrate SelectionDAGTargetInfo::EmitTargetCodeForMemcpy to Align This patch is part of a series to introduce an Alignment type. See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html See this patch for the introduction of the type: https://reviews.llvm.org/D64790 Differential Revision: https://reviews.llvm.org/D82849 --- llvm/include/llvm/CodeGen/SelectionDAGTargetInfo.h | 2 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 4 ++-- llvm/lib/Target/ARM/ARMSelectionDAGInfo.cpp | 12 ++++++------ llvm/lib/Target/ARM/ARMSelectionDAGInfo.h | 4 ++-- llvm/lib/Target/BPF/BPFSelectionDAGInfo.cpp | 6 +++--- llvm/lib/Target/BPF/BPFSelectionDAGInfo.h | 4 ++-- llvm/lib/Target/Hexagon/HexagonSelectionDAGInfo.cpp | 4 ++-- llvm/lib/Target/Hexagon/HexagonSelectionDAGInfo.h | 4 ++-- llvm/lib/Target/Lanai/LanaiSelectionDAGInfo.cpp | 2 +- llvm/lib/Target/Lanai/LanaiSelectionDAGInfo.h | 4 ++-- llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.cpp | 2 +- llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.h | 4 ++-- llvm/lib/Target/WebAssembly/WebAssemblySelectionDAGInfo.cpp | 4 ++-- llvm/lib/Target/WebAssembly/WebAssemblySelectionDAGInfo.h | 2 +- llvm/lib/Target/X86/X86SelectionDAGInfo.cpp | 10 +++++----- llvm/lib/Target/X86/X86SelectionDAGInfo.h | 4 ++-- llvm/lib/Target/XCore/XCoreSelectionDAGInfo.cpp | 4 ++-- llvm/lib/Target/XCore/XCoreSelectionDAGInfo.h | 2 +- 18 files changed, 39 insertions(+), 39 deletions(-) diff --git a/llvm/include/llvm/CodeGen/SelectionDAGTargetInfo.h b/llvm/include/llvm/CodeGen/SelectionDAGTargetInfo.h index bd4182ea..014523f 100644 --- a/llvm/include/llvm/CodeGen/SelectionDAGTargetInfo.h +++ b/llvm/include/llvm/CodeGen/SelectionDAGTargetInfo.h @@ -51,7 +51,7 @@ public: virtual SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Op1, SDValue Op2, SDValue Op3, - unsigned Align, bool isVolatile, + Align Alignment, bool isVolatile, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const { diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index d349688..202cacd 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -6411,8 +6411,8 @@ SDValue SelectionDAG::getMemcpy(SDValue Chain, const SDLoc &dl, SDValue Dst, // code. If the target chooses to do this, this is the next best. if (TSI) { SDValue Result = TSI->EmitTargetCodeForMemcpy( - *this, dl, Chain, Dst, Src, Size, Alignment.value(), isVol, - AlwaysInline, DstPtrInfo, SrcPtrInfo); + *this, dl, Chain, Dst, Src, Size, Alignment, isVol, AlwaysInline, + DstPtrInfo, SrcPtrInfo); if (Result.getNode()) return Result; } diff --git a/llvm/lib/Target/ARM/ARMSelectionDAGInfo.cpp b/llvm/lib/Target/ARM/ARMSelectionDAGInfo.cpp index 830305e..7e06229 100644 --- a/llvm/lib/Target/ARM/ARMSelectionDAGInfo.cpp +++ b/llvm/lib/Target/ARM/ARMSelectionDAGInfo.cpp @@ -126,24 +126,24 @@ SDValue ARMSelectionDAGInfo::EmitSpecializedLibcall( SDValue ARMSelectionDAGInfo::EmitTargetCodeForMemcpy( SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, - SDValue Size, unsigned Align, bool isVolatile, bool AlwaysInline, + SDValue Size, Align Alignment, bool isVolatile, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const { const ARMSubtarget &Subtarget = DAG.getMachineFunction().getSubtarget(); // Do repeated 4-byte loads and stores. To be improved. // This requires 4-byte alignment. - if ((Align & 3) != 0) + if (Alignment < Align(4)) return SDValue(); // This requires the copy size to be a constant, preferably // within a subtarget-specific limit. ConstantSDNode *ConstantSize = dyn_cast(Size); if (!ConstantSize) - return EmitSpecializedLibcall(DAG, dl, Chain, Dst, Src, Size, Align, - RTLIB::MEMCPY); + return EmitSpecializedLibcall(DAG, dl, Chain, Dst, Src, Size, + Alignment.value(), RTLIB::MEMCPY); uint64_t SizeVal = ConstantSize->getZExtValue(); if (!AlwaysInline && SizeVal > Subtarget.getMaxInlineSizeThreshold()) - return EmitSpecializedLibcall(DAG, dl, Chain, Dst, Src, Size, Align, - RTLIB::MEMCPY); + return EmitSpecializedLibcall(DAG, dl, Chain, Dst, Src, Size, + Alignment.value(), RTLIB::MEMCPY); unsigned BytesLeft = SizeVal & 3; unsigned NumMemOps = SizeVal >> 2; diff --git a/llvm/lib/Target/ARM/ARMSelectionDAGInfo.h b/llvm/lib/Target/ARM/ARMSelectionDAGInfo.h index 490040d..7aa831c 100644 --- a/llvm/lib/Target/ARM/ARMSelectionDAGInfo.h +++ b/llvm/lib/Target/ARM/ARMSelectionDAGInfo.h @@ -39,8 +39,8 @@ class ARMSelectionDAGInfo : public SelectionDAGTargetInfo { public: SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, - SDValue Size, unsigned Align, bool isVolatile, - bool AlwaysInline, + SDValue Size, Align Alignment, + bool isVolatile, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const override; diff --git a/llvm/lib/Target/BPF/BPFSelectionDAGInfo.cpp b/llvm/lib/Target/BPF/BPFSelectionDAGInfo.cpp index a711294..4c36c0ed 100644 --- a/llvm/lib/Target/BPF/BPFSelectionDAGInfo.cpp +++ b/llvm/lib/Target/BPF/BPFSelectionDAGInfo.cpp @@ -19,7 +19,7 @@ using namespace llvm; SDValue BPFSelectionDAGInfo::EmitTargetCodeForMemcpy( SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, - SDValue Size, unsigned Align, bool isVolatile, bool AlwaysInline, + SDValue Size, Align Alignment, bool isVolatile, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const { // Requires the copy size to be a constant. ConstantSDNode *ConstantSize = dyn_cast(Size); @@ -27,7 +27,7 @@ SDValue BPFSelectionDAGInfo::EmitTargetCodeForMemcpy( return SDValue(); unsigned CopyLen = ConstantSize->getZExtValue(); - unsigned StoresNumEstimate = alignTo(CopyLen, Align) >> Log2_32(Align); + unsigned StoresNumEstimate = alignTo(CopyLen, Alignment) >> Log2(Alignment); // Impose the same copy length limit as MaxStoresPerMemcpy. if (StoresNumEstimate > getCommonMaxStoresPerMemFunc()) return SDValue(); @@ -36,7 +36,7 @@ SDValue BPFSelectionDAGInfo::EmitTargetCodeForMemcpy( Dst = DAG.getNode(BPFISD::MEMCPY, dl, VTs, Chain, Dst, Src, DAG.getConstant(CopyLen, dl, MVT::i64), - DAG.getConstant(Align, dl, MVT::i64)); + DAG.getConstant(Alignment.value(), dl, MVT::i64)); return Dst.getValue(0); } diff --git a/llvm/lib/Target/BPF/BPFSelectionDAGInfo.h b/llvm/lib/Target/BPF/BPFSelectionDAGInfo.h index fb88c32..79f05e5 100644 --- a/llvm/lib/Target/BPF/BPFSelectionDAGInfo.h +++ b/llvm/lib/Target/BPF/BPFSelectionDAGInfo.h @@ -21,8 +21,8 @@ class BPFSelectionDAGInfo : public SelectionDAGTargetInfo { public: SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, - SDValue Size, unsigned Align, bool isVolatile, - bool AlwaysInline, + SDValue Size, Align Alignment, + bool isVolatile, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const override; diff --git a/llvm/lib/Target/Hexagon/HexagonSelectionDAGInfo.cpp b/llvm/lib/Target/Hexagon/HexagonSelectionDAGInfo.cpp index c5ba7ce..1b724e8 100644 --- a/llvm/lib/Target/Hexagon/HexagonSelectionDAGInfo.cpp +++ b/llvm/lib/Target/Hexagon/HexagonSelectionDAGInfo.cpp @@ -18,10 +18,10 @@ using namespace llvm; SDValue HexagonSelectionDAGInfo::EmitTargetCodeForMemcpy( SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, - SDValue Size, unsigned Align, bool isVolatile, bool AlwaysInline, + SDValue Size, Align Alignment, bool isVolatile, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const { ConstantSDNode *ConstantSize = dyn_cast(Size); - if (AlwaysInline || (Align & 0x3) != 0 || !ConstantSize) + if (AlwaysInline || Alignment < Align(4) || !ConstantSize) return SDValue(); uint64_t SizeVal = ConstantSize->getZExtValue(); diff --git a/llvm/lib/Target/Hexagon/HexagonSelectionDAGInfo.h b/llvm/lib/Target/Hexagon/HexagonSelectionDAGInfo.h index af8b831..0d3b172 100644 --- a/llvm/lib/Target/Hexagon/HexagonSelectionDAGInfo.h +++ b/llvm/lib/Target/Hexagon/HexagonSelectionDAGInfo.h @@ -23,8 +23,8 @@ public: SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, - SDValue Size, unsigned Align, bool isVolatile, - bool AlwaysInline, + SDValue Size, Align Alignment, + bool isVolatile, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const override; }; diff --git a/llvm/lib/Target/Lanai/LanaiSelectionDAGInfo.cpp b/llvm/lib/Target/Lanai/LanaiSelectionDAGInfo.cpp index dff87a3..307619c 100644 --- a/llvm/lib/Target/Lanai/LanaiSelectionDAGInfo.cpp +++ b/llvm/lib/Target/Lanai/LanaiSelectionDAGInfo.cpp @@ -20,7 +20,7 @@ namespace llvm { SDValue LanaiSelectionDAGInfo::EmitTargetCodeForMemcpy( SelectionDAG & /*DAG*/, const SDLoc & /*dl*/, SDValue /*Chain*/, - SDValue /*Dst*/, SDValue /*Src*/, SDValue Size, unsigned /*Align*/, + SDValue /*Dst*/, SDValue /*Src*/, SDValue Size, Align /*Alignment*/, bool /*isVolatile*/, bool /*AlwaysInline*/, MachinePointerInfo /*DstPtrInfo*/, MachinePointerInfo /*SrcPtrInfo*/) const { diff --git a/llvm/lib/Target/Lanai/LanaiSelectionDAGInfo.h b/llvm/lib/Target/Lanai/LanaiSelectionDAGInfo.h index c5650a7..8355168 100644 --- a/llvm/lib/Target/Lanai/LanaiSelectionDAGInfo.h +++ b/llvm/lib/Target/Lanai/LanaiSelectionDAGInfo.h @@ -24,8 +24,8 @@ public: SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, - SDValue Size, unsigned Align, bool isVolatile, - bool AlwaysInline, + SDValue Size, Align Alignment, + bool isVolatile, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const override; }; diff --git a/llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.cpp b/llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.cpp index c70f74f..6b4f35e 100644 --- a/llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.cpp +++ b/llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.cpp @@ -47,7 +47,7 @@ static SDValue emitMemMem(SelectionDAG &DAG, const SDLoc &DL, unsigned Sequence, SDValue SystemZSelectionDAGInfo::EmitTargetCodeForMemcpy( SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dst, SDValue Src, - SDValue Size, unsigned Align, bool IsVolatile, bool AlwaysInline, + SDValue Size, Align Alignment, bool IsVolatile, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const { if (IsVolatile) return SDValue(); diff --git a/llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.h b/llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.h index 2e1ad04..a4a5b1f 100644 --- a/llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.h +++ b/llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.h @@ -25,8 +25,8 @@ public: SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dst, SDValue Src, - SDValue Size, unsigned Align, bool IsVolatile, - bool AlwaysInline, + SDValue Size, Align Alignment, + bool IsVolatile, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const override; diff --git a/llvm/lib/Target/WebAssembly/WebAssemblySelectionDAGInfo.cpp b/llvm/lib/Target/WebAssembly/WebAssemblySelectionDAGInfo.cpp index b054abc..b2b2b7a 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblySelectionDAGInfo.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblySelectionDAGInfo.cpp @@ -20,7 +20,7 @@ WebAssemblySelectionDAGInfo::~WebAssemblySelectionDAGInfo() = default; // anchor SDValue WebAssemblySelectionDAGInfo::EmitTargetCodeForMemcpy( SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dst, SDValue Src, - SDValue Size, unsigned Align, bool IsVolatile, bool AlwaysInline, + SDValue Size, Align Alignment, bool IsVolatile, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const { if (!DAG.getMachineFunction() .getSubtarget() @@ -38,7 +38,7 @@ SDValue WebAssemblySelectionDAGInfo::EmitTargetCodeForMemmove( SDValue Op3, Align Alignment, bool IsVolatile, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const { return EmitTargetCodeForMemcpy(DAG, DL, Chain, Op1, Op2, Op3, - Alignment.value(), IsVolatile, false, + Alignment, IsVolatile, false, DstPtrInfo, SrcPtrInfo); } diff --git a/llvm/lib/Target/WebAssembly/WebAssemblySelectionDAGInfo.h b/llvm/lib/Target/WebAssembly/WebAssemblySelectionDAGInfo.h index bfeeae2..f4d2132 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblySelectionDAGInfo.h +++ b/llvm/lib/Target/WebAssembly/WebAssemblySelectionDAGInfo.h @@ -24,7 +24,7 @@ public: ~WebAssemblySelectionDAGInfo() override; SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Op1, SDValue Op2, - SDValue Op3, unsigned Align, bool isVolatile, + SDValue Op3, Align Alignment, bool isVolatile, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const override; diff --git a/llvm/lib/Target/X86/X86SelectionDAGInfo.cpp b/llvm/lib/Target/X86/X86SelectionDAGInfo.cpp index 38a5337..ce8d1d4 100644 --- a/llvm/lib/Target/X86/X86SelectionDAGInfo.cpp +++ b/llvm/lib/Target/X86/X86SelectionDAGInfo.cpp @@ -290,7 +290,7 @@ static SDValue emitConstantSizeRepmov( SDValue X86SelectionDAGInfo::EmitTargetCodeForMemcpy( SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, - SDValue Size, unsigned Align, bool isVolatile, bool AlwaysInline, + SDValue Size, Align Alignment, bool isVolatile, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const { // If to a segment-relative address space, use the default lowering. if (DstPtrInfo.getAddrSpace() >= 256 || SrcPtrInfo.getAddrSpace() >= 256) @@ -308,10 +308,10 @@ SDValue X86SelectionDAGInfo::EmitTargetCodeForMemcpy( /// Handle constant sizes, if (ConstantSDNode *ConstantSize = dyn_cast(Size)) - return emitConstantSizeRepmov(DAG, Subtarget, dl, Chain, Dst, Src, - ConstantSize->getZExtValue(), - Size.getValueType(), Align, isVolatile, - AlwaysInline, DstPtrInfo, SrcPtrInfo); + return emitConstantSizeRepmov( + DAG, Subtarget, dl, Chain, Dst, Src, ConstantSize->getZExtValue(), + Size.getValueType(), Alignment.value(), isVolatile, AlwaysInline, + DstPtrInfo, SrcPtrInfo); return SDValue(); } diff --git a/llvm/lib/Target/X86/X86SelectionDAGInfo.h b/llvm/lib/Target/X86/X86SelectionDAGInfo.h index aec312c..dac6297 100644 --- a/llvm/lib/Target/X86/X86SelectionDAGInfo.h +++ b/llvm/lib/Target/X86/X86SelectionDAGInfo.h @@ -34,8 +34,8 @@ public: SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, - SDValue Size, unsigned Align, bool isVolatile, - bool AlwaysInline, + SDValue Size, Align Alignment, + bool isVolatile, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const override; }; diff --git a/llvm/lib/Target/XCore/XCoreSelectionDAGInfo.cpp b/llvm/lib/Target/XCore/XCoreSelectionDAGInfo.cpp index c86756e..0d09707 100644 --- a/llvm/lib/Target/XCore/XCoreSelectionDAGInfo.cpp +++ b/llvm/lib/Target/XCore/XCoreSelectionDAGInfo.cpp @@ -17,11 +17,11 @@ using namespace llvm; SDValue XCoreSelectionDAGInfo::EmitTargetCodeForMemcpy( SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, - SDValue Size, unsigned Align, bool isVolatile, bool AlwaysInline, + SDValue Size, Align Alignment, bool isVolatile, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const { unsigned SizeBitWidth = Size.getValueSizeInBits(); // Call __memcpy_4 if the src, dst and size are all 4 byte aligned. - if (!AlwaysInline && (Align & 3) == 0 && + if (!AlwaysInline && Alignment >= Align(4) && DAG.MaskedValueIsZero(Size, APInt(SizeBitWidth, 3))) { const TargetLowering &TLI = *DAG.getSubtarget().getTargetLowering(); TargetLowering::ArgListTy Args; diff --git a/llvm/lib/Target/XCore/XCoreSelectionDAGInfo.h b/llvm/lib/Target/XCore/XCoreSelectionDAGInfo.h index 637e854..2abf526 100644 --- a/llvm/lib/Target/XCore/XCoreSelectionDAGInfo.h +++ b/llvm/lib/Target/XCore/XCoreSelectionDAGInfo.h @@ -21,7 +21,7 @@ class XCoreSelectionDAGInfo : public SelectionDAGTargetInfo { public: SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Op1, SDValue Op2, - SDValue Op3, unsigned Align, bool isVolatile, + SDValue Op3, Align Alignment, bool isVolatile, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const override; -- 2.7.4