From c19fae080497638ff4e1d16aff81cb9c9b80d527 Mon Sep 17 00:00:00 2001 From: =?utf8?q?=D0=A1=D0=B5=D1=80=D0=B3=D0=B5=D0=B9=20=D0=91=D0=B0=D1=80?= =?utf8?q?=D0=B0=D0=BD=D0=BD=D0=B8=D0=BA=D0=BE=D0=B2/AI=20Tools=20Lab=20/S?= =?utf8?q?RR/Engineer/=EC=82=BC=EC=84=B1=EC=A0=84=EC=9E=90?= Date: Fri, 9 Aug 2019 18:59:06 +0300 Subject: [PATCH] [nnc] Remove unused BatchNorm op (#6460) It will be reimplemented taking into account different variations between frameworks. Signed-off-by: Sergei Barannikov --- .../nnc/include/passes/interpreter/Interpreter.h | 1 - .../passes/acl_soft_backend/AclCppOpGenerator.cpp | 6 --- .../passes/acl_soft_backend/AclCppOpGenerator.h | 1 - compiler/nnc/passes/interpreter/Interpreter.cpp | 8 --- compiler/nnc/passes/interpreter/ops/BatchNorm.h | 62 ---------------------- compiler/nnc/passes/soft_backend/ModelAnalyzer.cpp | 2 - compiler/nnc/passes/soft_backend/ModelAnalyzer.h | 1 - compiler/nnc/passes/soft_backend/SBSerializer.cpp | 8 --- compiler/nnc/passes/soft_backend/SBSerializer.h | 1 - 9 files changed, 90 deletions(-) delete mode 100644 compiler/nnc/passes/interpreter/ops/BatchNorm.h diff --git a/compiler/nnc/include/passes/interpreter/Interpreter.h b/compiler/nnc/include/passes/interpreter/Interpreter.h index 51c1ec8..c72f993 100644 --- a/compiler/nnc/include/passes/interpreter/Interpreter.h +++ b/compiler/nnc/include/passes/interpreter/Interpreter.h @@ -39,7 +39,6 @@ public: mir::TensorVariant getResult(const mir::Operation::Output *tensor); void visit(mir::ops::AddOp &op) override; - void visit(mir::ops::BatchNormOp &op) override; void visit(mir::ops::CappedReluOp &op) override; void visit(mir::ops::ConcatOp &op) override; void visit(mir::ops::ConstantOp &op) override; diff --git a/compiler/nnc/passes/acl_soft_backend/AclCppOpGenerator.cpp b/compiler/nnc/passes/acl_soft_backend/AclCppOpGenerator.cpp index b9258a7..c6f5a35 100644 --- a/compiler/nnc/passes/acl_soft_backend/AclCppOpGenerator.cpp +++ b/compiler/nnc/passes/acl_soft_backend/AclCppOpGenerator.cpp @@ -449,12 +449,6 @@ void AclCppOpGenerator::visit(mir::ops::SliceOp & /*op*/) throw AclCppException("Unimplemented operation: SliceOp"); } -void AclCppOpGenerator::visit(ops::BatchNormOp & /*op*/) -{ - // Not supported in our framework, but present in ACL API. - throw AclCppException("Not supported in inference yet."); -} - void AclCppOpGenerator::visit(ops::DropoutOp &op) { assert(op.getNumInputs() == 1); diff --git a/compiler/nnc/passes/acl_soft_backend/AclCppOpGenerator.h b/compiler/nnc/passes/acl_soft_backend/AclCppOpGenerator.h index 9636c7e..cbf78d8 100644 --- a/compiler/nnc/passes/acl_soft_backend/AclCppOpGenerator.h +++ b/compiler/nnc/passes/acl_soft_backend/AclCppOpGenerator.h @@ -50,7 +50,6 @@ public: * @param op */ void visit(mir::ops::AddOp &op) override; - void visit(mir::ops::BatchNormOp &op) override; void visit(mir::ops::CappedReluOp &op) override; void visit(mir::ops::ConcatOp &op) override; void visit(mir::ops::ConstantOp &op) override; diff --git a/compiler/nnc/passes/interpreter/Interpreter.cpp b/compiler/nnc/passes/interpreter/Interpreter.cpp index f0ec990..b848b0e 100644 --- a/compiler/nnc/passes/interpreter/Interpreter.cpp +++ b/compiler/nnc/passes/interpreter/Interpreter.cpp @@ -17,7 +17,6 @@ #include "passes/interpreter/Interpreter.h" #include "ops/Add.h" -#include "ops/BatchNorm.h" #include "ops/Concat.h" #include "ops/Conv2D.h" #include "ops/DeConv2D.h" @@ -177,13 +176,6 @@ void NNInterpreter::visit(ops::DepthwiseConv2DOp &op) setOutputTensors(op, std::move(outputs)); } -void NNInterpreter::visit(ops::BatchNormOp &op) -{ - auto inputs = getInputTensors(op); - auto outputs = BatchNorm(inputs[0], op)(); - setOutputTensors(op, std::move(outputs)); -} - void NNInterpreter::visit(ops::SliceOp &op) { auto inputs = getInputTensors(op); diff --git a/compiler/nnc/passes/interpreter/ops/BatchNorm.h b/compiler/nnc/passes/interpreter/ops/BatchNorm.h deleted file mode 100644 index a410e22..0000000 --- a/compiler/nnc/passes/interpreter/ops/BatchNorm.h +++ /dev/null @@ -1,62 +0,0 @@ -/* - * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#ifndef _NNC_CORE_BACKEND_INTERPRETER_BATCHNORM_IMPL_ -#define _NNC_CORE_BACKEND_INTERPRETER_BATCHNORM_IMPL_ - -#include "OperationImpl.h" -#include "Fill.h" - -#include "mir/ops/BatchNormOp.h" - -namespace nnc -{ - -/** - * @brief Implements DropoutOp for interpreter backend - * @note Simply copies input to output - * @tparam T type of data in input tensor - */ -template class BatchNorm : public OperationImpl -{ -public: - /** - * @param in input data - * @param op batch normalization operation description - */ - explicit BatchNorm(const mir::TensorVariant &input, const mir::ops::BatchNormOp &op) - : _input(input), _op(op) - { - } - - /** - * @brief computes operation aplication result - * @return vector of all outputs from this node - */ - std::vector operator()() override - { - // For now BatchNorm just copies input to output - return Fill(_input.getShape(), [this](const mir::Index &idx) { return _input.at(idx); })(); - } - -private: - const mir::Tensor _input; - const mir::ops::BatchNormOp &_op; -}; - -} // namespace nnc - -#endif // _NNC_CORE_BACKEND_INTERPRETER_BATCHNORM_IMPL_ diff --git a/compiler/nnc/passes/soft_backend/ModelAnalyzer.cpp b/compiler/nnc/passes/soft_backend/ModelAnalyzer.cpp index 3f72a72..69d76b5 100644 --- a/compiler/nnc/passes/soft_backend/ModelAnalyzer.cpp +++ b/compiler/nnc/passes/soft_backend/ModelAnalyzer.cpp @@ -395,8 +395,6 @@ void ModelAnalyzer::visit(ops::DropoutOp &op) { appendOperationToInference(&op, void ModelAnalyzer::visit(mir::ops::SliceOp &op) { appendOperationToInference(&op, "slice"); } -void ModelAnalyzer::visit(ops::BatchNormOp &op) { appendOperationToInference(&op, "batchNorm"); } - void ModelAnalyzer::visit(mir::ops::TanhOp &op) { appendOperationToInference(&op, "tanhActivation"); diff --git a/compiler/nnc/passes/soft_backend/ModelAnalyzer.h b/compiler/nnc/passes/soft_backend/ModelAnalyzer.h index 1bd4af4..9dcbd25 100644 --- a/compiler/nnc/passes/soft_backend/ModelAnalyzer.h +++ b/compiler/nnc/passes/soft_backend/ModelAnalyzer.h @@ -48,7 +48,6 @@ public: void analyze(const mir::Graph *g); void visit(mir::ops::AddOp &op) override; - void visit(mir::ops::BatchNormOp &op) override; void visit(mir::ops::CappedReluOp &op) override; void visit(mir::ops::ConcatOp &op) override; void visit(mir::ops::ConstantOp &op) override; diff --git a/compiler/nnc/passes/soft_backend/SBSerializer.cpp b/compiler/nnc/passes/soft_backend/SBSerializer.cpp index 96580c8..b3b9b51 100644 --- a/compiler/nnc/passes/soft_backend/SBSerializer.cpp +++ b/compiler/nnc/passes/soft_backend/SBSerializer.cpp @@ -230,14 +230,6 @@ void Serializer::visit(ops::ReshapeOp &op) serializeShape(op.getOutputShape(0)); } -void Serializer::visit(ops::BatchNormOp &op) -{ - _curOp->paramStartOffset = _buffer.size(); - serializeT(op.getEps()); - serializeT(op.getMovingAvgFraction()); - serializeT(op.getSpatial()); -} - void Serializer::visit(mir::ops::SliceOp &op) { _curOp->paramStartOffset = _buffer.size(); diff --git a/compiler/nnc/passes/soft_backend/SBSerializer.h b/compiler/nnc/passes/soft_backend/SBSerializer.h index 36d58f0..444b321 100644 --- a/compiler/nnc/passes/soft_backend/SBSerializer.h +++ b/compiler/nnc/passes/soft_backend/SBSerializer.h @@ -42,7 +42,6 @@ class Serializer : public mir::IVisitor { public: void visit(mir::ops::AddOp &op) override; - void visit(mir::ops::BatchNormOp &op) override; void visit(mir::ops::CappedReluOp &op) override; void visit(mir::ops::ConcatOp &op) override; void visit(mir::ops::ConstantOp &op) override; -- 2.7.4