From c1523fc96a2aafa5ecb8d75927c6116cd545f585 Mon Sep 17 00:00:00 2001 From: Vaibhav Agarwal Date: Tue, 6 Mar 2012 15:28:54 +0530 Subject: [PATCH] Audio: Configure SSP3 for CTP in Audio driver BZ: 25850 In Medfield, SSPx is configured by SCU FW. However, in CTP platform it is not done. The solution can be:- CASE1: If audio driver should not be involved in SSP3 ALT-FUNC config then it has be to be done as follows: - In IFWI UMIP header, configure the GPIO pins, so that IA FW sets the corresponding FLIS registers. - During Audio D0i3 entry/exit, SCU FW saves and restores these values. CASE2: - audio driver configures SSP3 ALT-FUNC in probe. - During Audio D0i3 entry/exit, SCU FW saves and restores these values. CASE3: - audio driver configures SSP3 ALT_FUNC in probe and resume. As a workaround solution for usecase integration, CASE3 is implemented. If there is a power impact then we need to go for CASE1 or CASE2. Change-Id: I13f92b9559f4efe27feb9bec926ddc88946e0e60 Signed-off-by: Vaibhav Agarwal Reviewed-on: http://android.intel.com:8080/37685 Reviewed-by: buildbot Reviewed-by: Abdullah, Omair M Reviewed-by: Babu, Ramesh Reviewed-by: Kp, Jeeja Reviewed-by: Koul, Vinod Reviewed-by: Gupta, ArvindX K Reviewed-by: M, Arulselvan Tested-by: M, Arulselvan --- sound/pci/Kconfig | 2 +- sound/pci/sst/intel_sst.c | 28 ++++++++++++++++++++++++++++ 2 files changed, 29 insertions(+), 1 deletion(-) diff --git a/sound/pci/Kconfig b/sound/pci/Kconfig index f13f51a..700be8d 100644 --- a/sound/pci/Kconfig +++ b/sound/pci/Kconfig @@ -11,7 +11,7 @@ if SND_PCI config SND_INTEL_SST tristate "Intel SST (LPE) Driver" - depends on X86 && INTEL_SCU_IPC + depends on X86 && INTEL_SCU_IPC && GPIO_LANGWELL default n help Say Y here to include support for the Intel(R) MID SST DSP driver diff --git a/sound/pci/sst/intel_sst.c b/sound/pci/sst/intel_sst.c index c616e0b..de97691 100644 --- a/sound/pci/sst/intel_sst.c +++ b/sound/pci/sst/intel_sst.c @@ -38,6 +38,7 @@ #include #include #include +#include #include #include #include @@ -54,6 +55,12 @@ MODULE_DESCRIPTION("Intel (R) SST(R) Audio Engine Driver"); MODULE_LICENSE("GPL v2"); MODULE_VERSION(SST_DRIVER_VERSION); +/* GPIO pins used for SSP3 */ +#define CLV_I2S_3_CLK_GPIO_PIN 12 +#define CLV_I2S_3_FS_GPIO_PIN 13 +#define CLV_I2S_3_TXD_GPIO_PIN 74 +#define CLV_I2S_3_RXD_GPIO_PIN 75 + struct intel_sst_drv *sst_drv_ctx; static struct mutex drv_ctx_lock; struct class *sst_class; @@ -364,6 +371,17 @@ static int __devinit intel_sst_probe(struct pci_dev *pci, csr2 |= BIT(1)|BIT(2); sst_shim_write(sst_drv_ctx->shim, SST_CSR2, csr2); } + + /* GPIO_PIN 12,13,74,75 needs to be configured in + * ALT_FUNC_2 mode for SSP3 IOs + */ + if (sst_drv_ctx->pci_id == SST_CLV_PCI_ID) { + lnw_gpio_set_alt(CLV_I2S_3_CLK_GPIO_PIN, LNW_ALT_2); + lnw_gpio_set_alt(CLV_I2S_3_FS_GPIO_PIN, LNW_ALT_2); + lnw_gpio_set_alt(CLV_I2S_3_TXD_GPIO_PIN, LNW_ALT_2); + lnw_gpio_set_alt(CLV_I2S_3_RXD_GPIO_PIN, LNW_ALT_2); + } + sst_drv_ctx->lpe_stalled = 0; pci_set_drvdata(pci, sst_drv_ctx); pm_runtime_allow(&pci->dev); @@ -584,6 +602,16 @@ static int intel_sst_runtime_resume(struct device *dev) csr |= (sst_drv_ctx->csr_value | 0x30000); sst_shim_write(sst_drv_ctx->shim, SST_CSR, csr); + /* GPIO_PIN 12,13,74,75 needs to be configured in + * ALT_FUNC_2 mode for SSP3 IOs + */ + if (sst_drv_ctx->pci_id == SST_CLV_PCI_ID) { + lnw_gpio_set_alt(CLV_I2S_3_CLK_GPIO_PIN, LNW_ALT_2); + lnw_gpio_set_alt(CLV_I2S_3_FS_GPIO_PIN, LNW_ALT_2); + lnw_gpio_set_alt(CLV_I2S_3_TXD_GPIO_PIN, LNW_ALT_2); + lnw_gpio_set_alt(CLV_I2S_3_RXD_GPIO_PIN, LNW_ALT_2); + } + intel_sst_set_pll(true, SST_PLL_AUDIO); sst_set_fw_state_locked(sst_drv_ctx, SST_UN_INIT); return 0; -- 2.7.4