From c09fa38c01e44581db37703bb6b8cf1b60b2d09f Mon Sep 17 00:00:00 2001 From: Chris Wilson Date: Sun, 5 Sep 2010 12:05:52 +0100 Subject: [PATCH] reg dumper: Dump ILK panel fitting control debug registers Signed-off-by: Chris Wilson --- lib/intel_reg.h | 6 ++++++ tools/intel_reg_dumper.c | 31 +++++++++++++++++++++++++++++-- 2 files changed, 35 insertions(+), 2 deletions(-) diff --git a/lib/intel_reg.h b/lib/intel_reg.h index f068dd8..42ad883 100644 --- a/lib/intel_reg.h +++ b/lib/intel_reg.h @@ -3255,6 +3255,12 @@ typedef enum { #define PFA_CTL_1 0x68080 #define PFB_CTL_1 0x68880 #define PF_ENABLE (1<<31) +#define PFA_CTL_2 0x68084 +#define PFB_CTL_2 0x68884 +#define PFA_CTL_3 0x68088 +#define PFB_CTL_3 0x68888 +#define PFA_CTL_4 0x68090 +#define PFB_CTL_4 0x68890 #define PFA_WIN_POS 0x68070 #define PFB_WIN_POS 0x68870 diff --git a/tools/intel_reg_dumper.c b/tools/intel_reg_dumper.c index 5205230..ff939ef 100644 --- a/tools/intel_reg_dumper.c +++ b/tools/intel_reg_dumper.c @@ -1284,6 +1284,27 @@ DEBUGSTRING(ironlake_debug_panel_fitting) val & (1 << 20) ? "field 0" : "field 1"); } +DEBUGSTRING(ironlake_debug_panel_fitting_2) +{ + asprintf(result, + "vscale %f", + val / (float) (1<<15)); +} + +DEBUGSTRING(ironlake_debug_panel_fitting_3) +{ + asprintf(result, + "vscale initial phase %f", + val / (float) (1<<15)); +} + +DEBUGSTRING(ironlake_debug_panel_fitting_4) +{ + asprintf(result, + "hscale %f", + val / (float) (1<<15)); +} + DEBUGSTRING(ironlake_debug_pf_win) { int a, b; @@ -1518,10 +1539,16 @@ static struct reg_debug ironlake_debug_regs[] = { DEFINEREG2(PIPEB_LINK_N2, ironlake_debug_n), DEFINEREG2(PFA_CTL_1, ironlake_debug_panel_fitting), - DEFINEREG2(PFB_CTL_1, ironlake_debug_panel_fitting), + DEFINEREG2(PFA_CTL_2, ironlake_debug_panel_fitting_2), + DEFINEREG2(PFA_CTL_3, ironlake_debug_panel_fitting_3), + DEFINEREG2(PFA_CTL_4, ironlake_debug_panel_fitting_4), DEFINEREG2(PFA_WIN_POS, ironlake_debug_pf_win), - DEFINEREG2(PFB_WIN_POS, ironlake_debug_pf_win), DEFINEREG2(PFA_WIN_SIZE, ironlake_debug_pf_win), + DEFINEREG2(PFB_CTL_1, ironlake_debug_panel_fitting), + DEFINEREG2(PFB_CTL_2, ironlake_debug_panel_fitting_2), + DEFINEREG2(PFB_CTL_3, ironlake_debug_panel_fitting_3), + DEFINEREG2(PFB_CTL_4, ironlake_debug_panel_fitting_4), + DEFINEREG2(PFB_WIN_POS, ironlake_debug_pf_win), DEFINEREG2(PFB_WIN_SIZE, ironlake_debug_pf_win), /* PCH */ -- 2.7.4