From c01f750480fc918f58fa25a789eda0e1eaea5117 Mon Sep 17 00:00:00 2001 From: Alexander Ivchenko Date: Wed, 28 Feb 2018 12:11:53 +0000 Subject: [PATCH] [GlobalIsel][X86] Support G_INTTOPTR instruction. Add legalization/selection for x86/x86_64 and corresponding tests. Reviewed By: igorb Differential Revision: https://reviews.llvm.org/D43622 llvm-svn: 326320 --- llvm/lib/Target/X86/X86InstructionSelector.cpp | 2 ++ llvm/lib/Target/X86/X86LegalizerInfo.cpp | 5 ++- llvm/test/CodeGen/X86/GlobalISel/inttoptr.ll | 12 +++++++ .../X86/GlobalISel/x86-legalize-inttoptr.mir | 39 ++++++++++++++++++++++ .../CodeGen/X86/GlobalISel/x86-select-inttoptr.mir | 39 ++++++++++++++++++++++ .../X86/GlobalISel/x86_64-legalize-inttoptr.mir | 35 +++++++++++++++++++ .../X86/GlobalISel/x86_64-select-inttoptr.mir | 36 ++++++++++++++++++++ 7 files changed, 167 insertions(+), 1 deletion(-) create mode 100644 llvm/test/CodeGen/X86/GlobalISel/inttoptr.ll create mode 100644 llvm/test/CodeGen/X86/GlobalISel/x86-legalize-inttoptr.mir create mode 100644 llvm/test/CodeGen/X86/GlobalISel/x86-select-inttoptr.mir create mode 100644 llvm/test/CodeGen/X86/GlobalISel/x86_64-legalize-inttoptr.mir create mode 100644 llvm/test/CodeGen/X86/GlobalISel/x86_64-select-inttoptr.mir diff --git a/llvm/lib/Target/X86/X86InstructionSelector.cpp b/llvm/lib/Target/X86/X86InstructionSelector.cpp index 67b31a8..afbf5d5 100644 --- a/llvm/lib/Target/X86/X86InstructionSelector.cpp +++ b/llvm/lib/Target/X86/X86InstructionSelector.cpp @@ -350,6 +350,8 @@ bool X86InstructionSelector::select(MachineInstr &I, case TargetOpcode::G_PTRTOINT: case TargetOpcode::G_TRUNC: return selectTruncOrPtrToInt(I, MRI, MF); + case TargetOpcode::G_INTTOPTR: + return selectCopy(I, MRI); case TargetOpcode::G_ZEXT: return selectZext(I, MRI, MF); case TargetOpcode::G_ANYEXT: diff --git a/llvm/lib/Target/X86/X86LegalizerInfo.cpp b/llvm/lib/Target/X86/X86LegalizerInfo.cpp index 050e5ef..bcf0ffb 100644 --- a/llvm/lib/Target/X86/X86LegalizerInfo.cpp +++ b/llvm/lib/Target/X86/X86LegalizerInfo.cpp @@ -124,11 +124,13 @@ void X86LegalizerInfo::setLegalizerInfo32bit() { setAction({G_GEP, p0}, Legal); setAction({G_GEP, 1, s32}, Legal); - if (!Subtarget.is64Bit()) + if (!Subtarget.is64Bit()) { getActionDefinitionsBuilder(G_PTRTOINT) .legalForCartesianProduct({s1, s8, s16, s32}, {p0}) .maxScalar(0, s32) .widenScalarToNextPow2(0, /*Min*/ 8); + getActionDefinitionsBuilder(G_INTTOPTR).legalFor({s32, p0}); + } // Control-flow setAction({G_BRCOND, s1}, Legal); @@ -194,6 +196,7 @@ void X86LegalizerInfo::setLegalizerInfo64bit() { .legalForCartesianProduct({s1, s8, s16, s32, s64}, {p0}) .maxScalar(0, s64) .widenScalarToNextPow2(0, /*Min*/ 8); + getActionDefinitionsBuilder(G_INTTOPTR).legalFor({s64, p0}); // Constants setAction({TargetOpcode::G_CONSTANT, s64}, Legal); diff --git a/llvm/test/CodeGen/X86/GlobalISel/inttoptr.ll b/llvm/test/CodeGen/X86/GlobalISel/inttoptr.ll new file mode 100644 index 0000000..c03d1af --- /dev/null +++ b/llvm/test/CodeGen/X86/GlobalISel/inttoptr.ll @@ -0,0 +1,12 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=CHECK + +define i64* @inttoptr_p0_s64(i64 %val) { +; CHECK-LABEL: inttoptr_p0_s64: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: movq %rdi, %rax +; CHECK-NEXT: retq +entry: + %0 = inttoptr i64 %val to i64* + ret i64* %0 +} diff --git a/llvm/test/CodeGen/X86/GlobalISel/x86-legalize-inttoptr.mir b/llvm/test/CodeGen/X86/GlobalISel/x86-legalize-inttoptr.mir new file mode 100644 index 0000000..11708721 --- /dev/null +++ b/llvm/test/CodeGen/X86/GlobalISel/x86-legalize-inttoptr.mir @@ -0,0 +1,39 @@ +# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py +# RUN: llc -mtriple=i686-linux-gnu -global-isel -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s + +--- | + + define i32* @inttoptr_p0_s32(i32 %val) { + entry: + %0 = inttoptr i32 %val to i32* + ret i32* %0 + } + +... +--- +name: inttoptr_p0_s32 +alignment: 4 +tracksRegLiveness: true +registers: + - { id: 0, class: _ } + - { id: 1, class: _ } + - { id: 2, class: _ } +frameInfo: + maxAlignment: 4 +fixedStack: + - { id: 0, size: 4, alignment: 16, stack-id: 0, isImmutable: true } +body: | + bb.1.entry: + ; CHECK-LABEL: name: inttoptr_p0_s32 + ; CHECK: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0 + ; CHECK: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (invariant load 4 from %fixed-stack.0, align 0) + ; CHECK: [[INTTOPTR:%[0-9]+]]:_(p0) = G_INTTOPTR [[LOAD]](s32) + ; CHECK: $eax = COPY [[INTTOPTR]](p0) + ; CHECK: RET 0, implicit $eax + %1:_(p0) = G_FRAME_INDEX %fixed-stack.0 + %0:_(s32) = G_LOAD %1(p0) :: (invariant load 4 from %fixed-stack.0, align 0) + %2:_(p0) = G_INTTOPTR %0(s32) + $eax = COPY %2(p0) + RET 0, implicit $eax + +... diff --git a/llvm/test/CodeGen/X86/GlobalISel/x86-select-inttoptr.mir b/llvm/test/CodeGen/X86/GlobalISel/x86-select-inttoptr.mir new file mode 100644 index 0000000..7657b2d --- /dev/null +++ b/llvm/test/CodeGen/X86/GlobalISel/x86-select-inttoptr.mir @@ -0,0 +1,39 @@ +# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py +# RUN: llc -mtriple=i386-linux-gnu -global-isel -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s + +--- | + + define i32* @inttoptr_p0_s32(i32 %val) { + entry: + %0 = inttoptr i32 %val to i32* + ret i32* %0 + } + +... +--- +name: inttoptr_p0_s32 +alignment: 4 +legalized: true +regBankSelected: true +tracksRegLiveness: true +registers: + - { id: 0, class: gpr } + - { id: 1, class: gpr } + - { id: 2, class: gpr } +frameInfo: + maxAlignment: 4 +fixedStack: + - { id: 0, size: 4, alignment: 16, stack-id: 0, isImmutable: true } +body: | + bb.1.entry: + ; CHECK-LABEL: name: inttoptr_p0_s32 + ; CHECK: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm %fixed-stack.0, 1, $noreg, 0, $noreg :: (invariant load 4 from %fixed-stack.0, align 0) + ; CHECK: $eax = COPY [[MOV32rm]] + ; CHECK: RET 0, implicit $eax + %1:gpr(p0) = G_FRAME_INDEX %fixed-stack.0 + %0:gpr(s32) = G_LOAD %1(p0) :: (invariant load 4 from %fixed-stack.0, align 0) + %2:gpr(p0) = G_INTTOPTR %0(s32) + $eax = COPY %2(p0) + RET 0, implicit $eax + +... diff --git a/llvm/test/CodeGen/X86/GlobalISel/x86_64-legalize-inttoptr.mir b/llvm/test/CodeGen/X86/GlobalISel/x86_64-legalize-inttoptr.mir new file mode 100644 index 0000000..7880303 --- /dev/null +++ b/llvm/test/CodeGen/X86/GlobalISel/x86_64-legalize-inttoptr.mir @@ -0,0 +1,35 @@ +# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py +# RUN: llc -mtriple=x86_64-linux-gnu -global-isel -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s + +--- | + + define i64* @inttoptr_p0_s64(i64 %val) { + entry: + %0 = inttoptr i64 %val to i64* + ret i64* %0 + } + +... +--- +name: inttoptr_p0_s64 +alignment: 4 +tracksRegLiveness: true +registers: + - { id: 0, class: _ } + - { id: 1, class: _ } +body: | + bb.1.entry: + liveins: $rdi + + ; CHECK-LABEL: name: inttoptr_p0_s64 + ; CHECK: liveins: $rdi + ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $rdi + ; CHECK: [[INTTOPTR:%[0-9]+]]:_(p0) = G_INTTOPTR [[COPY]](s64) + ; CHECK: $rax = COPY [[INTTOPTR]](p0) + ; CHECK: RET 0, implicit $rax + %0:_(s64) = COPY $rdi + %1:_(p0) = G_INTTOPTR %0(s64) + $rax = COPY %1(p0) + RET 0, implicit $rax + +... diff --git a/llvm/test/CodeGen/X86/GlobalISel/x86_64-select-inttoptr.mir b/llvm/test/CodeGen/X86/GlobalISel/x86_64-select-inttoptr.mir new file mode 100644 index 0000000..06c26c3 --- /dev/null +++ b/llvm/test/CodeGen/X86/GlobalISel/x86_64-select-inttoptr.mir @@ -0,0 +1,36 @@ +# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py +# RUN: llc -mtriple=x86_64-linux-gnu -global-isel -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s + +--- | + + define i64* @inttoptr_p0_s64(i64 %val) { + entry: + %0 = inttoptr i64 %val to i64* + ret i64* %0 + } + +... +--- +name: inttoptr_p0_s64 +alignment: 4 +legalized: true +regBankSelected: true +tracksRegLiveness: true +registers: + - { id: 0, class: gpr } + - { id: 1, class: gpr } +body: | + bb.1.entry: + liveins: $rdi + + ; CHECK-LABEL: name: inttoptr_p0_s64 + ; CHECK: liveins: $rdi + ; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rdi + ; CHECK: $rax = COPY [[COPY]] + ; CHECK: RET 0, implicit $rax + %0:gpr(s64) = COPY $rdi + %1:gpr(p0) = G_INTTOPTR %0(s64) + $rax = COPY %1(p0) + RET 0, implicit $rax + +... -- 2.7.4