From bf4a0485d9afd12098cc7e21aa12988f2fcb9480 Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Mon, 15 Apr 2019 18:41:15 +0200 Subject: [PATCH] radv: set ACCESS_NON_READABLE on stores for copy/fill/clear meta shaders The compiler will emit GLC=1. Signed-off-by: Samuel Pitoiset Reviewed-by: Bas Nieuwenhuizen --- src/amd/vulkan/radv_meta_buffer.c | 2 ++ src/amd/vulkan/radv_meta_clear.c | 1 + 2 files changed, 3 insertions(+) diff --git a/src/amd/vulkan/radv_meta_buffer.c b/src/amd/vulkan/radv_meta_buffer.c index b3aed10..3e4f63a 100644 --- a/src/amd/vulkan/radv_meta_buffer.c +++ b/src/amd/vulkan/radv_meta_buffer.c @@ -51,6 +51,7 @@ build_buffer_fill_shader(struct radv_device *dev) store->src[1] = nir_src_for_ssa(&dst_buf->dest.ssa); store->src[2] = nir_src_for_ssa(offset); nir_intrinsic_set_write_mask(store, 0xf); + nir_intrinsic_set_access(store, ACCESS_NON_READABLE); store->num_components = 4; nir_builder_instr_insert(&b, &store->instr); @@ -110,6 +111,7 @@ build_buffer_copy_shader(struct radv_device *dev) store->src[1] = nir_src_for_ssa(&dst_buf->dest.ssa); store->src[2] = nir_src_for_ssa(offset); nir_intrinsic_set_write_mask(store, 0xf); + nir_intrinsic_set_access(store, ACCESS_NON_READABLE); store->num_components = 4; nir_builder_instr_insert(&b, &store->instr); diff --git a/src/amd/vulkan/radv_meta_clear.c b/src/amd/vulkan/radv_meta_clear.c index 4407bd7..101ef43 100644 --- a/src/amd/vulkan/radv_meta_clear.c +++ b/src/amd/vulkan/radv_meta_clear.c @@ -1114,6 +1114,7 @@ build_clear_htile_mask_shader() store->src[1] = nir_src_for_ssa(&buf->dest.ssa); store->src[2] = nir_src_for_ssa(offset); nir_intrinsic_set_write_mask(store, 0xf); + nir_intrinsic_set_access(store, ACCESS_NON_READABLE); store->num_components = 4; nir_builder_instr_insert(&b, &store->instr); -- 2.7.4