From be95b4dec2604247d9fbad5f7641b4373b740904 Mon Sep 17 00:00:00 2001 From: Stefan Pintilie Date: Mon, 8 May 2023 12:22:03 -0400 Subject: [PATCH] [PowerPC] Look through OR, AND, XOR instructions when checking a clear. This patch adds the additional step of looking through AND, OR, XOR instructions when we check the number of leading zeros. Reviewed By: shchenz Differential Revision: https://reviews.llvm.org/D149223 --- llvm/lib/Target/PowerPC/PPCMIPeephole.cpp | 14 ++++++++++++++ llvm/test/CodeGen/PowerPC/ppc-clear-before-return.ll | 8 -------- 2 files changed, 14 insertions(+), 8 deletions(-) diff --git a/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp b/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp index f1d1d2f..34da55e 100644 --- a/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp +++ b/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp @@ -219,6 +219,20 @@ static unsigned getKnownLeadingZeroCount(const unsigned Reg, Opcode == PPC::LBZU8 || Opcode == PPC::LBZUX8) return 56; + if (Opcode == PPC::AND || Opcode == PPC::AND8 || Opcode == PPC::AND_rec || + Opcode == PPC::AND8_rec) + return std::max( + getKnownLeadingZeroCount(MI->getOperand(1).getReg(), TII, MRI), + getKnownLeadingZeroCount(MI->getOperand(2).getReg(), TII, MRI)); + + if (Opcode == PPC::OR || Opcode == PPC::OR8 || Opcode == PPC::XOR || + Opcode == PPC::XOR8 || Opcode == PPC::OR_rec || + Opcode == PPC::OR8_rec || Opcode == PPC::XOR_rec || + Opcode == PPC::XOR8_rec) + return std::min( + getKnownLeadingZeroCount(MI->getOperand(1).getReg(), TII, MRI), + getKnownLeadingZeroCount(MI->getOperand(2).getReg(), TII, MRI)); + if (TII->isZeroExtended(Reg, MRI)) return 32; diff --git a/llvm/test/CodeGen/PowerPC/ppc-clear-before-return.ll b/llvm/test/CodeGen/PowerPC/ppc-clear-before-return.ll index 03d859f..f77bd69 100644 --- a/llvm/test/CodeGen/PowerPC/ppc-clear-before-return.ll +++ b/llvm/test/CodeGen/PowerPC/ppc-clear-before-return.ll @@ -15,7 +15,6 @@ define dso_local i64 @test_xor(ptr nocapture noundef readonly %inp) local_unname ; 64BIT-NEXT: lbz r4, 0(r3) ; 64BIT-NEXT: lbz r3, 1(r3) ; 64BIT-NEXT: xor r3, r3, r4 -; 64BIT-NEXT: clrldi r3, r3, 56 ; 64BIT-NEXT: blr ; ; 32BIT-LABEL: test_xor: @@ -43,7 +42,6 @@ define dso_local i64 @test_xor2(ptr nocapture noundef readonly %inp) local_unnam ; 64BIT-NEXT: lbz r3, 2(r3) ; 64BIT-NEXT: xor r4, r5, r4 ; 64BIT-NEXT: xor r3, r4, r3 -; 64BIT-NEXT: clrldi r3, r3, 56 ; 64BIT-NEXT: blr ; ; 32BIT-LABEL: test_xor2: @@ -74,7 +72,6 @@ define dso_local i64 @test_or(ptr nocapture noundef readonly %inp) local_unnamed ; 64BIT-NEXT: lbz r4, 0(r3) ; 64BIT-NEXT: lbz r3, 1(r3) ; 64BIT-NEXT: or r3, r3, r4 -; 64BIT-NEXT: clrldi r3, r3, 56 ; 64BIT-NEXT: blr ; ; 32BIT-LABEL: test_or: @@ -102,7 +99,6 @@ define dso_local i64 @test_or2(ptr nocapture noundef readonly %inp) local_unname ; 64BIT-NEXT: lbz r3, 2(r3) ; 64BIT-NEXT: or r4, r5, r4 ; 64BIT-NEXT: or r3, r4, r3 -; 64BIT-NEXT: clrldi r3, r3, 56 ; 64BIT-NEXT: blr ; ; 32BIT-LABEL: test_or2: @@ -133,7 +129,6 @@ define dso_local i64 @test_and(ptr nocapture noundef readonly %inp) local_unname ; 64BIT-NEXT: lbz r4, 0(r3) ; 64BIT-NEXT: lbz r3, 1(r3) ; 64BIT-NEXT: and r3, r3, r4 -; 64BIT-NEXT: clrldi r3, r3, 56 ; 64BIT-NEXT: blr ; ; 32BIT-LABEL: test_and: @@ -161,7 +156,6 @@ define dso_local i64 @test_and2(ptr nocapture noundef readonly %inp) local_unnam ; 64BIT-NEXT: lbz r3, 2(r3) ; 64BIT-NEXT: and r4, r5, r4 ; 64BIT-NEXT: and r3, r4, r3 -; 64BIT-NEXT: clrldi r3, r3, 56 ; 64BIT-NEXT: blr ; ; 32BIT-LABEL: test_and2: @@ -196,7 +190,6 @@ define dso_local i64 @test_mixed(ptr nocapture noundef readonly %inp) local_unna ; 64BIT-NEXT: and r4, r5, r4 ; 64BIT-NEXT: xor r4, r4, r6 ; 64BIT-NEXT: or r3, r4, r3 -; 64BIT-NEXT: clrldi r3, r3, 56 ; 64BIT-NEXT: blr ; ; 32BIT-LABEL: test_mixed: @@ -236,7 +229,6 @@ define dso_local i64 @test_mixedtype(ptr nocapture noundef readonly %inp, ptr no ; 64BIT-NEXT: and r5, r6, r5 ; 64BIT-NEXT: xor r3, r5, r3 ; 64BIT-NEXT: or r3, r3, r4 -; 64BIT-NEXT: clrldi r3, r3, 48 ; 64BIT-NEXT: blr ; ; 32BIT-LABEL: test_mixedtype: -- 2.7.4