From bdc2eea4722b96f54edb7588078540505b5ac096 Mon Sep 17 00:00:00 2001 From: Chunming Zhou Date: Fri, 22 Jul 2016 13:01:02 +0800 Subject: [PATCH] drm/amd: reset hw count when reset job MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Means the hw ring is empty after gpu reset. Signed-off-by: Chunming Zhou Reviewed-by: Christian König Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/scheduler/gpu_scheduler.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/amd/scheduler/gpu_scheduler.c b/drivers/gpu/drm/amd/scheduler/gpu_scheduler.c index 70ff09d..21c49d3 100644 --- a/drivers/gpu/drm/amd/scheduler/gpu_scheduler.c +++ b/drivers/gpu/drm/amd/scheduler/gpu_scheduler.c @@ -393,6 +393,7 @@ void amd_sched_hw_job_reset(struct amd_gpu_scheduler *sched) s_job->s_fence->parent = NULL; } } + atomic_set(&sched->hw_rq_count, 0); spin_unlock(&sched->job_list_lock); } @@ -410,6 +411,8 @@ void amd_sched_job_recovery(struct amd_gpu_scheduler *sched) list_for_each_entry(s_job, &sched->ring_mirror_list, node) { struct amd_sched_fence *s_fence = s_job->s_fence; struct fence *fence = sched->ops->run_job(s_job); + + atomic_inc(&sched->hw_rq_count); if (fence) { s_fence->parent = fence_get(fence); r = fence_add_callback(fence, &s_fence->cb, -- 2.7.4