From bd8b673003078309341c81b6a059f3bdebd81c4b Mon Sep 17 00:00:00 2001 From: Ye Li Date: Fri, 29 Oct 2021 09:46:23 +0800 Subject: [PATCH] imx8ulp: Fix DCNANO QoS setting The setting does not have effect because we should set it after power on the PS16 for NIC AV. So move it after upower_init which has powered on all PS Reviewed-by: Peng Fan Signed-off-by: Ye Li Signed-off-by: Peng Fan --- arch/arm/include/asm/arch-imx8ulp/sys_proto.h | 1 + arch/arm/mach-imx/imx8ulp/soc.c | 3 +++ board/freescale/imx8ulp_evk/spl.c | 3 +++ 3 files changed, 7 insertions(+) diff --git a/arch/arm/include/asm/arch-imx8ulp/sys_proto.h b/arch/arm/include/asm/arch-imx8ulp/sys_proto.h index 1a142dc..8e2c6ed 100644 --- a/arch/arm/include/asm/arch-imx8ulp/sys_proto.h +++ b/arch/arm/include/asm/arch-imx8ulp/sys_proto.h @@ -16,4 +16,5 @@ enum bt_mode get_boot_mode(void); int xrdc_config_pdac(u32 bridge, u32 index, u32 dom, u32 perm); int xrdc_config_pdac_openacc(u32 bridge, u32 index); enum boot_device get_boot_device(void); +void set_lpav_qos(void); #endif diff --git a/arch/arm/mach-imx/imx8ulp/soc.c b/arch/arm/mach-imx/imx8ulp/soc.c index 0cf4765..2348132 100644 --- a/arch/arm/mach-imx/imx8ulp/soc.c +++ b/arch/arm/mach-imx/imx8ulp/soc.c @@ -485,7 +485,10 @@ void lpav_configure(void) writel(0x1f, SIM_SEC_BASE_ADDR + 0x50); writel(0xffffffff, SIM_SEC_BASE_ADDR + 0x54); writel(0x003fffff, SIM_SEC_BASE_ADDR + 0x58); +} +void set_lpav_qos(void) +{ /* Set read QoS of dcnano on LPAV NIC */ writel(0xf, 0x2e447100); } diff --git a/board/freescale/imx8ulp_evk/spl.c b/board/freescale/imx8ulp_evk/spl.c index faece33..42f8e26 100644 --- a/board/freescale/imx8ulp_evk/spl.c +++ b/board/freescale/imx8ulp_evk/spl.c @@ -90,6 +90,9 @@ void spl_board_init(void) /* Init XRDC MRC for VIDEO, DSP domains */ xrdc_init_mrc(); + + /* Call it after PS16 power up */ + set_lpav_qos(); } void board_init_f(ulong dummy) -- 2.7.4