From bd0eff316a4c7b833af06187ec8989ac28b5ae31 Mon Sep 17 00:00:00 2001 From: Alex Bradbury Date: Sat, 9 Mar 2019 09:30:14 +0000 Subject: [PATCH] [RISCV][NFC] Split out emitSelectPseudo from EmitInstrWithCustomInserter It's cleaner and more consistent to have a separate helper function here. llvm-svn: 355772 --- llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 35 ++++++++++++++++------------- 1 file changed, 19 insertions(+), 16 deletions(-) diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp index d844a83..37a91ac 100644 --- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp +++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp @@ -787,22 +787,8 @@ static MachineBasicBlock *emitBuildPairF64Pseudo(MachineInstr &MI, return BB; } -MachineBasicBlock * -RISCVTargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI, - MachineBasicBlock *BB) const { - switch (MI.getOpcode()) { - default: - llvm_unreachable("Unexpected instr type to insert"); - case RISCV::Select_GPR_Using_CC_GPR: - case RISCV::Select_FPR32_Using_CC_GPR: - case RISCV::Select_FPR64_Using_CC_GPR: - break; - case RISCV::BuildPairF64Pseudo: - return emitBuildPairF64Pseudo(MI, BB); - case RISCV::SplitF64Pseudo: - return emitSplitF64Pseudo(MI, BB); - } - +static MachineBasicBlock *emitSelectPseudo(MachineInstr &MI, + MachineBasicBlock *BB) { // To "insert" a SELECT instruction, we actually have to insert the triangle // control-flow pattern. The incoming instruction knows the destination vreg // to set, the condition code register to branch on, the true/false values to @@ -862,6 +848,23 @@ RISCVTargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI, return TailMBB; } +MachineBasicBlock * +RISCVTargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI, + MachineBasicBlock *BB) const { + switch (MI.getOpcode()) { + default: + llvm_unreachable("Unexpected instr type to insert"); + case RISCV::Select_GPR_Using_CC_GPR: + case RISCV::Select_FPR32_Using_CC_GPR: + case RISCV::Select_FPR64_Using_CC_GPR: + return emitSelectPseudo(MI, BB); + case RISCV::BuildPairF64Pseudo: + return emitBuildPairF64Pseudo(MI, BB); + case RISCV::SplitF64Pseudo: + return emitSplitF64Pseudo(MI, BB); + } +} + // Calling Convention Implementation. // The expectations for frontend ABI lowering vary from target to target. // Ideally, an LLVM frontend would be able to avoid worrying about many ABI -- 2.7.4