From bcf89f05f7b0b1732553e224548f1de55321e437 Mon Sep 17 00:00:00 2001 From: Jakub Jelinek Date: Tue, 6 Dec 2022 12:16:37 +0100 Subject: [PATCH] i386: Fix up expander conditions on cbranchbf4 and cstorebf4 [PR107969] With -msoft-float we ICE on __bf16 comparisons, because the insns we want to use under the hood (cbranchsf4 and cstoresf4) after performing the fast extensions aren't available. The following patch copies the conditions from the c*sf4 expanders to the corresponding c*bf4 expanders. 2022-12-06 Jakub Jelinek PR target/107969 * config/i386/i386.md (cbranchbf4, cstorebf4): Guard expanders with the same condition as cbranchsf4 or cstoresf4 expanders. * gcc.target/i386/pr107969.c: New test. --- gcc/config/i386/i386.md | 4 ++-- gcc/testsuite/gcc.target/i386/pr107969.c | 12 ++++++++++++ 2 files changed, 14 insertions(+), 2 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/pr107969.c diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 2975b5e..58853a7 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -1667,7 +1667,7 @@ (const_int 0)]) (label_ref (match_operand 3)) (pc)))] - "" + "TARGET_80387 || (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH)" { rtx op1 = ix86_expand_fast_convert_bf_to_sf (operands[1]); rtx op2 = ix86_expand_fast_convert_bf_to_sf (operands[2]); @@ -1702,7 +1702,7 @@ (match_operator 1 "comparison_operator" [(reg:CC FLAGS_REG) (const_int 0)]))] - "" + "TARGET_80387 || (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH)" { rtx op1 = ix86_expand_fast_convert_bf_to_sf (operands[2]); rtx op2 = ix86_expand_fast_convert_bf_to_sf (operands[3]); diff --git a/gcc/testsuite/gcc.target/i386/pr107969.c b/gcc/testsuite/gcc.target/i386/pr107969.c new file mode 100644 index 0000000..f73a862 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr107969.c @@ -0,0 +1,12 @@ +/* PR target/107969 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -fexcess-precision=16 -msoft-float -msse2" } */ + +int i; +__bf16 f; + +void +bar (void) +{ + i *= 0 <= f; +} -- 2.7.4