From bc07b1a0bf22054c9a683a43e9f7f7632446431f Mon Sep 17 00:00:00 2001 From: Yogesh Mohan Marimuthu Date: Fri, 20 Jan 2023 12:29:00 +0530 Subject: [PATCH] radeonsi: remove some shadow reg optimization for bf1 game MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit This patch removes below shadow reg optimization. This is done for Vega64 battlefield 1 crash when shadow regs enabled. + reset only dirty states with buffers in si_pm4_reset_emitted() + various draw states in si_begin_new_gfx_cs() v2: remove first_cs parameter from si_pm4_reset_emitted() (Marek Olšák) Signed-off-by: Yogesh Mohan Marimuthu Reviewed-by: Marek Olšák Part-of: --- src/gallium/drivers/radeonsi/si_gfx_cs.c | 42 +++++++++++++++----------------- src/gallium/drivers/radeonsi/si_pm4.c | 17 +------------ src/gallium/drivers/radeonsi/si_pm4.h | 2 +- 3 files changed, 22 insertions(+), 39 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_gfx_cs.c b/src/gallium/drivers/radeonsi/si_gfx_cs.c index 0c48240..0a48aee 100644 --- a/src/gallium/drivers/radeonsi/si_gfx_cs.c +++ b/src/gallium/drivers/radeonsi/si_gfx_cs.c @@ -415,10 +415,8 @@ void si_begin_new_gfx_cs(struct si_context *ctx, bool first_cs) si_add_all_descriptors_to_bo_list(ctx); - if (first_cs || !ctx->shadowed_regs) { - si_shader_pointers_mark_dirty(ctx); - ctx->cs_shader_state.initialized = false; - } + si_shader_pointers_mark_dirty(ctx); + ctx->cs_shader_state.initialized = false; if (!ctx->has_graphics) { ctx->initial_gfx_cs_size = ctx->gfx_cs.current.cdw; @@ -434,7 +432,7 @@ void si_begin_new_gfx_cs(struct si_context *ctx, bool first_cs) /* set all valid group as dirty so they get reemited on * next draw command */ - si_pm4_reset_emitted(ctx, first_cs); + si_pm4_reset_emitted(ctx); /* The CS initialization should be emitted before everything else. */ if (ctx->cs_preamble_state) { @@ -460,7 +458,7 @@ void si_begin_new_gfx_cs(struct si_context *ctx, bool first_cs) /* CLEAR_STATE disables all colorbuffers, so only enable bound ones. */ bool has_clear_state = ctx->screen->info.has_clear_state; - if (has_clear_state || ctx->shadowed_regs) { + if (has_clear_state) { ctx->framebuffer.dirty_cbufs = u_bit_consecutive(0, ctx->framebuffer.state.nr_cbufs); /* CLEAR_STATE disables the zbuffer, so only enable it if it's bound. */ @@ -508,22 +506,6 @@ void si_begin_new_gfx_cs(struct si_context *ctx, bool first_cs) si_mark_atom_dirty(ctx, &ctx->atoms.s.scissors); si_mark_atom_dirty(ctx, &ctx->atoms.s.viewports); - /* Invalidate various draw states so that they are emitted before - * the first draw call. */ - si_invalidate_draw_constants(ctx); - ctx->last_index_size = -1; - ctx->last_primitive_restart_en = -1; - ctx->last_restart_index = SI_RESTART_INDEX_UNKNOWN; - ctx->last_prim = -1; - ctx->last_multi_vgt_param = -1; - ctx->last_vs_state = ~0; - ctx->last_gs_state = ~0; - ctx->last_ls = NULL; - ctx->last_tcs = NULL; - ctx->last_tes_sh_base = -1; - ctx->last_num_tcs_input_cp = -1; - ctx->last_ls_hs_config = -1; /* impossible value */ - if (has_clear_state) { si_set_tracked_regs_to_clear_state(ctx); } else { @@ -536,6 +518,22 @@ void si_begin_new_gfx_cs(struct si_context *ctx, bool first_cs) memset(ctx->tracked_regs.spi_ps_input_cntl, 0xff, sizeof(uint32_t) * 32); } + /* Invalidate various draw states so that they are emitted before + * the first draw call. */ + si_invalidate_draw_constants(ctx); + ctx->last_index_size = -1; + ctx->last_primitive_restart_en = -1; + ctx->last_restart_index = SI_RESTART_INDEX_UNKNOWN; + ctx->last_prim = -1; + ctx->last_multi_vgt_param = -1; + ctx->last_vs_state = ~0; + ctx->last_gs_state = ~0; + ctx->last_ls = NULL; + ctx->last_tcs = NULL; + ctx->last_tes_sh_base = -1; + ctx->last_num_tcs_input_cp = -1; + ctx->last_ls_hs_config = -1; /* impossible value */ + if (ctx->scratch_buffer) { si_context_add_resource_size(ctx, &ctx->scratch_buffer->b.b); si_mark_atom_dirty(ctx, &ctx->atoms.s.scratch_state); diff --git a/src/gallium/drivers/radeonsi/si_pm4.c b/src/gallium/drivers/radeonsi/si_pm4.c index f8454cd..280125b 100644 --- a/src/gallium/drivers/radeonsi/si_pm4.c +++ b/src/gallium/drivers/radeonsi/si_pm4.c @@ -151,23 +151,8 @@ void si_pm4_emit(struct si_context *sctx, struct si_pm4_state *state) state->atom.emit(sctx); } -void si_pm4_reset_emitted(struct si_context *sctx, bool first_cs) +void si_pm4_reset_emitted(struct si_context *sctx) { - if (!first_cs && sctx->shadowed_regs) { - /* Only dirty states that contain buffers, so that they are - * added to the buffer list on the next draw call. - */ - for (unsigned i = 0; i < SI_NUM_STATES; i++) { - struct si_pm4_state *state = sctx->queued.array[i]; - - if (state && state->is_shader) { - sctx->emitted.array[i] = NULL; - sctx->dirty_states |= 1 << i; - } - } - return; - } - memset(&sctx->emitted, 0, sizeof(sctx->emitted)); for (unsigned i = 0; i < SI_NUM_STATES; i++) { diff --git a/src/gallium/drivers/radeonsi/si_pm4.h b/src/gallium/drivers/radeonsi/si_pm4.h index 4d1770a..486b627 100644 --- a/src/gallium/drivers/radeonsi/si_pm4.h +++ b/src/gallium/drivers/radeonsi/si_pm4.h @@ -70,7 +70,7 @@ void si_pm4_clear_state(struct si_pm4_state *state); void si_pm4_free_state(struct si_context *sctx, struct si_pm4_state *state, unsigned idx); void si_pm4_emit(struct si_context *sctx, struct si_pm4_state *state); -void si_pm4_reset_emitted(struct si_context *sctx, bool first_cs); +void si_pm4_reset_emitted(struct si_context *sctx); #ifdef __cplusplus } -- 2.7.4