From bbe5b23dfdd346e782f8c56ab01bb3f5eaddd438 Mon Sep 17 00:00:00 2001 From: Carlo Caione Date: Mon, 17 Apr 2017 23:42:44 +0200 Subject: [PATCH] ARM: dts: meson: Extend L2 cache controller node for Meson8 and Meson8b This patch extends the L2 cache controller node for the Amlogic Meson8 and Meson8b SoCs with some missing parameters. These are taken from the Amlogic GPL kernel source. Signed-off-by: Carlo Caione [apply the change to Meson8 and Meson8b and updated description] Signed-off-by: Martin Blumenstingl Signed-off-by: Kevin Hilman --- arch/arm/boot/dts/meson8.dtsi | 6 ++++++ arch/arm/boot/dts/meson8b.dtsi | 6 ++++++ 2 files changed, 12 insertions(+) diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi index 5eaaf06..69930773 100644 --- a/arch/arm/boot/dts/meson8.dtsi +++ b/arch/arm/boot/dts/meson8.dtsi @@ -188,6 +188,12 @@ clocks = <&clk81>; }; +&L2 { + arm,data-latency = <3 3 3>; + arm,tag-latency = <2 2 2>; + arm,filter-ranges = <0x100000 0xc0000000>; +}; + &spifc { clocks = <&clk81>; }; diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi index ef9ac97..d9f116a 100644 --- a/arch/arm/boot/dts/meson8b.dtsi +++ b/arch/arm/boot/dts/meson8b.dtsi @@ -171,6 +171,12 @@ }; }; +&L2 { + arm,data-latency = <3 3 3>; + arm,tag-latency = <2 2 2>; + arm,filter-ranges = <0x100000 0xc0000000>; +}; + &uart_AO { clocks = <&clkc CLKID_CLK81>; }; -- 2.7.4