From bb7016f8f50e1f1b8d388a9a42e3a7bb51254ca2 Mon Sep 17 00:00:00 2001 From: Nick Desaulniers Date: Thu, 15 Apr 2021 23:10:16 -0700 Subject: [PATCH] [Aarch64] handle "o" inline asm memory constraints This Linux kernel is making use of this inline asm constraint which is causing an ICE. PR49956 Link: https://github.com/ClangBuiltLinux/linux/issues/1348 Reviewed By: MaskRay Differential Revision: https://reviews.llvm.org/D100412 --- llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp | 1 + llvm/lib/Target/AArch64/AArch64ISelLowering.h | 2 ++ llvm/test/CodeGen/AArch64/arm64-inline-asm.ll | 10 ++++++++++ 3 files changed, 13 insertions(+) diff --git a/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp b/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp index f70eee6..3d8aa29 100644 --- a/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp +++ b/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp @@ -369,6 +369,7 @@ bool AArch64DAGToDAGISel::SelectInlineAsmMemoryOperand( default: llvm_unreachable("Unexpected asm memory constraint"); case InlineAsm::Constraint_m: + case InlineAsm::Constraint_o: case InlineAsm::Constraint_Q: // We need to make sure that this one operand does not end up in XZR, thus // require the address to be in a PointerRegClass register. diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.h b/llvm/lib/Target/AArch64/AArch64ISelLowering.h index 63df223..c67f3b0a 100644 --- a/llvm/lib/Target/AArch64/AArch64ISelLowering.h +++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.h @@ -1027,6 +1027,8 @@ private: unsigned getInlineAsmMemConstraint(StringRef ConstraintCode) const override { if (ConstraintCode == "Q") return InlineAsm::Constraint_Q; + if (ConstraintCode == "o") + return InlineAsm::Constraint_o; // FIXME: clang has code for 'Ump', 'Utf', 'Usa', and 'Ush' but these are // followed by llvm_unreachable so we'll leave them unimplemented in // the backend for now. diff --git a/llvm/test/CodeGen/AArch64/arm64-inline-asm.ll b/llvm/test/CodeGen/AArch64/arm64-inline-asm.ll index 5381e65..cb3e095 100644 --- a/llvm/test/CodeGen/AArch64/arm64-inline-asm.ll +++ b/llvm/test/CodeGen/AArch64/arm64-inline-asm.ll @@ -297,3 +297,13 @@ entry: call void asm sideeffect "", "=*r|m,0,~{memory}"(<9 x float>* nonnull %m.addr, <9 x float> %m) ret void } + +define void @test_o_output_constraint() { +; CHECK-LABEL: test_o_output_constraint: +; CHECK: sub sp, sp, #16 +; CHECK: add x[[REG:[0-9]+]], sp, #15 +; CHECK: mov [x[[REG]]], 7 + %b = alloca i8, align 1 + call void asm "mov $0, 7", "=*o"(i8* %b) + ret void +} -- 2.7.4