From bae980b1596770345883aadfba1aeabcdb0e3363 Mon Sep 17 00:00:00 2001 From: Kai Tietz Date: Mon, 27 Feb 2012 20:18:23 +0100 Subject: [PATCH] pr46939.c (long): Fix LP64 vs LLP64 issue. * gcc.target/i386/pr46939.c (long): Fix LP64 vs LLP64 issue. * gcc.target/i386/pr45352-2.c: Likewise. * gcc.target/i386/bitfield3.c: Add -mno-ms-bitfields for mingw targets. * gcc.target/i386/xop-vshift-1.c(random): Use on mingw targets instead rand. * gcc.target/i386/sse4_1-blendps-2.c: Likewise. * gcc.target/i386/sse2-mul-1.c: Likewise. * gcc.target/i386/sse4_1-blendps.c: Likewise. * gcc.target/i386/pad-6b.c: Adjust test for x64 mingw target. * gcc.target/i386/pad-1.c: Likewise. * gcc.target/i386/pad-9.c: Likewise. * gcc.target/i386/pad-2.c: Likewise. * gcc.target/i386/pad-5b.c: Likewise. * gcc.target/i386/pad-8.c: Likewise. * gcc.target/i386/pr46470.c: Skip for x64 mingw target. * gcc.target/i386/pr44130.c: Likewise. * gcc.target/i386/align-main-1.c: Likewise. * gcc.target/i386/align-main-2.c: Likewise. * gcc.target/i386/sw-1.c: Likewise. * gcc.target/i386/avx-vzeroupper-5.c: Add -mabi=sysv on x64 mingw target. * gcc.target/i386/avx-vzeroupper-4.c: Likewise. * gcc.target/i386/pr46295.c: Likewise. * gcc.target/i386/amd64-abi-1.c: Likewise. * gcc.target/i386/amd64-abi-2.c: Likewise. * gcc.target/i386/pr39082-1.c: Likewise. * gcc.target/i386/pr39162.c: Likewise. * gcc.target/i386/pr22152.c: Likewise. * gcc.target/i386/wrgsbase-2.c: Adjust dg-final rule. * gcc.target/i386/wrfsbase-2.c: Likewise. * gcc.target/i386/local.c: Likewise * gcc.target/i386/wrgsbase-1.c: Likewise. * gcc.target/i386/wrfsbase-1.c: Likewise. * gcc.target/i386/pr39315-3.c: Likewise. * gcc.target/i386/pr35767-4.c: Likewise. * gcc.target/i386/pr45336-3.c (pextrd): Don't check for x64 mingw target. * gcc.target/i386/pr45336-2.c: Likewise. * gcc.target/i386/pr45336-1.c: Likewise. * gcc.target/i386/pr45336-4.c: Likewise. From-SVN: r184607 --- gcc/testsuite/ChangeLog | 46 ++++++++++++++++++++++++ gcc/testsuite/gcc.target/i386/align-main-1.c | 2 ++ gcc/testsuite/gcc.target/i386/align-main-2.c | 2 +- gcc/testsuite/gcc.target/i386/amd64-abi-1.c | 1 + gcc/testsuite/gcc.target/i386/amd64-abi-2.c | 2 ++ gcc/testsuite/gcc.target/i386/avx-vzeroupper-4.c | 1 + gcc/testsuite/gcc.target/i386/avx-vzeroupper-5.c | 1 + gcc/testsuite/gcc.target/i386/bitfield3.c | 3 +- gcc/testsuite/gcc.target/i386/local.c | 2 +- gcc/testsuite/gcc.target/i386/pad-1.c | 2 +- gcc/testsuite/gcc.target/i386/pad-2.c | 3 +- gcc/testsuite/gcc.target/i386/pad-5b.c | 3 +- gcc/testsuite/gcc.target/i386/pad-6b.c | 3 +- gcc/testsuite/gcc.target/i386/pad-8.c | 3 +- gcc/testsuite/gcc.target/i386/pad-9.c | 3 +- gcc/testsuite/gcc.target/i386/pr22152.c | 1 + gcc/testsuite/gcc.target/i386/pr35767-4.c | 2 +- gcc/testsuite/gcc.target/i386/pr39082-1.c | 1 + gcc/testsuite/gcc.target/i386/pr39162.c | 1 + gcc/testsuite/gcc.target/i386/pr39315-3.c | 2 +- gcc/testsuite/gcc.target/i386/pr44130.c | 1 + gcc/testsuite/gcc.target/i386/pr45336-1.c | 2 +- gcc/testsuite/gcc.target/i386/pr45336-2.c | 2 +- gcc/testsuite/gcc.target/i386/pr45336-3.c | 2 +- gcc/testsuite/gcc.target/i386/pr45336-4.c | 2 +- gcc/testsuite/gcc.target/i386/pr45352-2.c | 8 +++-- gcc/testsuite/gcc.target/i386/pr46295.c | 1 + gcc/testsuite/gcc.target/i386/pr46470.c | 3 +- gcc/testsuite/gcc.target/i386/pr46939.c | 7 ++-- gcc/testsuite/gcc.target/i386/sse2-mul-1.c | 5 +++ gcc/testsuite/gcc.target/i386/sse4_1-blendps-2.c | 5 +++ gcc/testsuite/gcc.target/i386/sse4_1-blendps.c | 5 +++ gcc/testsuite/gcc.target/i386/sw-1.c | 1 + gcc/testsuite/gcc.target/i386/wrfsbase-1.c | 2 +- gcc/testsuite/gcc.target/i386/wrfsbase-2.c | 2 +- gcc/testsuite/gcc.target/i386/wrgsbase-1.c | 2 +- gcc/testsuite/gcc.target/i386/wrgsbase-2.c | 2 +- gcc/testsuite/gcc.target/i386/xop-vshift-1.c | 5 +++ 38 files changed, 116 insertions(+), 25 deletions(-) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index a267742..fab88d9 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,49 @@ +2012-02-28 Kai Tietz + + * gcc.target/i386/pr46939.c (long): Fix LP64 vs LLP64 + issue. + * gcc.target/i386/pr45352-2.c: Likewise. + * gcc.target/i386/bitfield3.c: Add -mno-ms-bitfields for + mingw targets. + * gcc.target/i386/xop-vshift-1.c(random): Use on mingw + targets instead rand. + * gcc.target/i386/sse4_1-blendps-2.c: Likewise. + * gcc.target/i386/sse2-mul-1.c: Likewise. + * gcc.target/i386/sse4_1-blendps.c: Likewise. + * gcc.target/i386/pad-6b.c: Adjust test for x64 mingw + target. + * gcc.target/i386/pad-1.c: Likewise. + * gcc.target/i386/pad-9.c: Likewise. + * gcc.target/i386/pad-2.c: Likewise. + * gcc.target/i386/pad-5b.c: Likewise. + * gcc.target/i386/pad-8.c: Likewise. + * gcc.target/i386/pr46470.c: Skip for x64 mingw target. + * gcc.target/i386/pr44130.c: Likewise. + * gcc.target/i386/align-main-1.c: Likewise. + * gcc.target/i386/align-main-2.c: Likewise. + * gcc.target/i386/sw-1.c: Likewise. + * gcc.target/i386/avx-vzeroupper-5.c: Add -mabi=sysv + on x64 mingw target. + * gcc.target/i386/avx-vzeroupper-4.c: Likewise. + * gcc.target/i386/pr46295.c: Likewise. + * gcc.target/i386/amd64-abi-1.c: Likewise. + * gcc.target/i386/amd64-abi-2.c: Likewise. + * gcc.target/i386/pr39082-1.c: Likewise. + * gcc.target/i386/pr39162.c: Likewise. + * gcc.target/i386/pr22152.c: Likewise. + * gcc.target/i386/wrgsbase-2.c: Adjust dg-final rule. + * gcc.target/i386/wrfsbase-2.c: Likewise. + * gcc.target/i386/local.c: Likewise + * gcc.target/i386/wrgsbase-1.c: Likewise. + * gcc.target/i386/wrfsbase-1.c: Likewise. + * gcc.target/i386/pr39315-3.c: Likewise. + * gcc.target/i386/pr35767-4.c: Likewise. + * gcc.target/i386/pr45336-3.c (pextrd): Don't check for + x64 mingw target. + * gcc.target/i386/pr45336-2.c: Likewise. + * gcc.target/i386/pr45336-1.c: Likewise. + * gcc.target/i386/pr45336-4.c: Likewise. + 2012-02-27 Tristan Gingold * gnat.dg/array20.ad[sb]: New test. diff --git a/gcc/testsuite/gcc.target/i386/align-main-1.c b/gcc/testsuite/gcc.target/i386/align-main-1.c index 699c7f8..f62284f 100644 --- a/gcc/testsuite/gcc.target/i386/align-main-1.c +++ b/gcc/testsuite/gcc.target/i386/align-main-1.c @@ -4,10 +4,12 @@ /* { dg-options "-O2 -mpreferred-stack-boundary=6 -mincoming-stack-boundary=6" } */ /* { dg-final { scan-assembler "and\[lq\]?\[\\t \]*\\$-128,\[\\t \]*%\[re\]?sp" } } */ /* { dg-final { scan-assembler-not "and\[lq\]?\[\\t \]*\\$-64,\[\\t \]*%\[re\]?sp" } } */ +/* { dg-skip-if "Options about stack-boundary aren't support" { x86_64-*-mingw* } { "*" } { "" } } */ #include #define ALIGNMENT 128 + typedef int aligned __attribute__((aligned(ALIGNMENT))); extern void abort(void); diff --git a/gcc/testsuite/gcc.target/i386/align-main-2.c b/gcc/testsuite/gcc.target/i386/align-main-2.c index 65c49e7..b817589 100644 --- a/gcc/testsuite/gcc.target/i386/align-main-2.c +++ b/gcc/testsuite/gcc.target/i386/align-main-2.c @@ -4,7 +4,7 @@ /* { dg-options "-O2 -mpreferred-stack-boundary=6 -mincoming-stack-boundary=6" } */ /* { dg-final { scan-assembler "and\[lq\]?\[\\t \]*\\$-64,\[\\t \]*%\[re\]?sp" } } */ /* { dg-final { scan-assembler-not "and\[lq\]?\[\\t \]*\\$-128,\[\\t \]*%\[re\]?sp" } } */ - +/* { dg-skip-if "Options about stack-boundary aren't support" { x86_64-*-mingw* } { "*" } { "" } } */ #include #define ALIGNMENT 32 diff --git a/gcc/testsuite/gcc.target/i386/amd64-abi-1.c b/gcc/testsuite/gcc.target/i386/amd64-abi-1.c index 6aa7063..8988f79 100644 --- a/gcc/testsuite/gcc.target/i386/amd64-abi-1.c +++ b/gcc/testsuite/gcc.target/i386/amd64-abi-1.c @@ -1,5 +1,6 @@ /* { dg-do compile { target { ! { ia32 } } } } */ /* { dg-options "-mno-sse" } */ +/* { dg-additional-options "-mabi=sysv" { target *-*-mingw* } } */ double foo(void) { return 0; } /* { dg-error "SSE disabled" } */ void bar(double x) { } diff --git a/gcc/testsuite/gcc.target/i386/amd64-abi-2.c b/gcc/testsuite/gcc.target/i386/amd64-abi-2.c index acc2a9e..6146e8e 100644 --- a/gcc/testsuite/gcc.target/i386/amd64-abi-2.c +++ b/gcc/testsuite/gcc.target/i386/amd64-abi-2.c @@ -1,6 +1,8 @@ /* PR target/26223 */ /* { dg-do compile { target { ! { ia32 } } } } */ /* { dg-options "-mno-80387" } */ +/* { dg-additional-options "-mabi=sysv" { target *-*-mingw* } } */ + long double foo(long double x) { return x; } /* { dg-error "x87 disabled" } */ long double bar(long double x) { return x; } diff --git a/gcc/testsuite/gcc.target/i386/avx-vzeroupper-4.c b/gcc/testsuite/gcc.target/i386/avx-vzeroupper-4.c index c55c814..4676617 100644 --- a/gcc/testsuite/gcc.target/i386/avx-vzeroupper-4.c +++ b/gcc/testsuite/gcc.target/i386/avx-vzeroupper-4.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O0 -mavx -mvzeroupper -dp" } */ +/* { dg-additional-options "-mabi=sysv" { target x86_64-*-mingw* } } */ typedef float __m256 __attribute__ ((__vector_size__ (32), __may_alias__)); diff --git a/gcc/testsuite/gcc.target/i386/avx-vzeroupper-5.c b/gcc/testsuite/gcc.target/i386/avx-vzeroupper-5.c index a14460c..0f54602 100644 --- a/gcc/testsuite/gcc.target/i386/avx-vzeroupper-5.c +++ b/gcc/testsuite/gcc.target/i386/avx-vzeroupper-5.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O0 -mavx -mvzeroupper -dp" } */ +/* { dg-additional-options "-mabi=sysv" { target x86_64-*-mingw* } } */ #include diff --git a/gcc/testsuite/gcc.target/i386/bitfield3.c b/gcc/testsuite/gcc.target/i386/bitfield3.c index 139f4d4..1a16159 100644 --- a/gcc/testsuite/gcc.target/i386/bitfield3.c +++ b/gcc/testsuite/gcc.target/i386/bitfield3.c @@ -1,7 +1,8 @@ // Test for bitfield alignment in structs on IA-32 // { dg-do run } // { dg-options "-O2" } -// { dg-options "-mno-align-double -mno-ms-bitfields" { target *-*-interix* } } +// { dg-additional-options "-mno-align-double -mno-ms-bitfields" { target *-*-interix* } } +// { dg-additional-options "-mno-ms-bitfields" { target *-*-mingw* } } extern void abort (void); extern void exit (int); diff --git a/gcc/testsuite/gcc.target/i386/local.c b/gcc/testsuite/gcc.target/i386/local.c index 872fd4d..4423001 100644 --- a/gcc/testsuite/gcc.target/i386/local.c +++ b/gcc/testsuite/gcc.target/i386/local.c @@ -1,7 +1,7 @@ /* { dg-do compile } */ /* { dg-options "-O2 -funit-at-a-time" } */ /* { dg-final { scan-assembler "magic\[^\\n\]*eax" { target ia32 } } } */ -/* { dg-final { scan-assembler "magic\[^\\n\]*edi" { target { ! { ia32 } } } } } */ +/* { dg-final { scan-assembler "magic\[^\\n\]*(edi|ecx)" { target { ! { ia32 } } } } } */ /* Verify that local calling convention is used. */ static t(int) __attribute__ ((noinline)); diff --git a/gcc/testsuite/gcc.target/i386/pad-1.c b/gcc/testsuite/gcc.target/i386/pad-1.c index 770c44d..c2e27c9 100644 --- a/gcc/testsuite/gcc.target/i386/pad-1.c +++ b/gcc/testsuite/gcc.target/i386/pad-1.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2 -fomit-frame-pointer -mtune=generic" } */ -/* { dg-final { scan-assembler "rep" } } */ +/* { dg-final { scan-assembler "rep" { target { ! x86_64-*-mingw* } } } } */ /* { dg-final { scan-assembler-not "nop" } } */ void diff --git a/gcc/testsuite/gcc.target/i386/pad-2.c b/gcc/testsuite/gcc.target/i386/pad-2.c index 05b19d3..fe45c19 100644 --- a/gcc/testsuite/gcc.target/i386/pad-2.c +++ b/gcc/testsuite/gcc.target/i386/pad-2.c @@ -1,7 +1,8 @@ /* { dg-do compile } */ /* { dg-skip-if "" { i?86-*-* x86_64-*-* } { "-march=*" } { "-march=atom" } } */ /* { dg-options "-O2 -fomit-frame-pointer -march=atom" } */ -/* { dg-final { scan-assembler-times "nop" 8 } } */ +/* { dg-final { scan-assembler-times "nop" 8 { target { ! x86_64-*-mingw* } } } } */ +/* { dg-final { scan-assembler-times "nop" 6 { target { x86_64-*-mingw* } } } } */ /* { dg-final { scan-assembler-not "rep" } } */ void diff --git a/gcc/testsuite/gcc.target/i386/pad-5b.c b/gcc/testsuite/gcc.target/i386/pad-5b.c index a3c9d30..4cd0340 100644 --- a/gcc/testsuite/gcc.target/i386/pad-5b.c +++ b/gcc/testsuite/gcc.target/i386/pad-5b.c @@ -1,7 +1,8 @@ /* { dg-do compile { target { ! { ia32 } } } } */ /* { dg-skip-if "" { i?86-*-* x86_64-*-* } { "-march=*" } { "-march=atom" } } */ /* { dg-options "-O2 -fomit-frame-pointer -march=atom" } */ -/* { dg-final { scan-assembler-times "nop" 4 } } */ +/* { dg-final { scan-assembler-times "nop" 4 { target { ! x86_64-*-mingw* } } } } */ +/* { dg-final { scan-assembler-times "nop" 2 { target { x86_64-*-mingw* } } } } */ /* { dg-final { scan-assembler-not "rep" } } */ int diff --git a/gcc/testsuite/gcc.target/i386/pad-6b.c b/gcc/testsuite/gcc.target/i386/pad-6b.c index e4956f0..82a3d33 100644 --- a/gcc/testsuite/gcc.target/i386/pad-6b.c +++ b/gcc/testsuite/gcc.target/i386/pad-6b.c @@ -1,7 +1,8 @@ /* { dg-do compile { target { ! { ia32 } } } } */ /* { dg-skip-if "" { i?86-*-* x86_64-*-* } { "-march=*" } { "-march=atom" } } */ /* { dg-options "-O2 -fomit-frame-pointer -march=atom" } */ -/* { dg-final { scan-assembler-times "nop" 6 } } */ +/* { dg-final { scan-assembler-times "nop" 6 { target { ! x86_64-*-mingw* } } } } */ +/* { dg-final { scan-assembler-times "nop" 4 { target { x86_64-*-mingw* } } } } */ /* { dg-final { scan-assembler-not "rep" } } */ int diff --git a/gcc/testsuite/gcc.target/i386/pad-8.c b/gcc/testsuite/gcc.target/i386/pad-8.c index ebb6e72..634cd74 100644 --- a/gcc/testsuite/gcc.target/i386/pad-8.c +++ b/gcc/testsuite/gcc.target/i386/pad-8.c @@ -1,7 +1,8 @@ /* { dg-do compile } */ /* { dg-skip-if "" { i?86-*-* x86_64-*-* } { "-march=*" } { "-march=atom" } } */ /* { dg-options "-O2 -fomit-frame-pointer -march=atom" } */ -/* { dg-final { scan-assembler-times "nop" 6 } } */ +/* { dg-final { scan-assembler-times "nop" 6 { target { ! x86_64-*-mingw* } } } } */ +/* { dg-final { scan-assembler-times "nop" 4 { target { x86_64-*-mingw* } } } } */ /* { dg-final { scan-assembler-not "rep" } } */ int diff --git a/gcc/testsuite/gcc.target/i386/pad-9.c b/gcc/testsuite/gcc.target/i386/pad-9.c index b1a5815..226a093 100644 --- a/gcc/testsuite/gcc.target/i386/pad-9.c +++ b/gcc/testsuite/gcc.target/i386/pad-9.c @@ -1,7 +1,8 @@ /* { dg-do compile { target { ! { ia32 } } } } */ /* { dg-skip-if "" { i?86-*-* x86_64-*-* } { "-march=*" } { "-march=atom" } } */ /* { dg-options "-O2 -fomit-frame-pointer -march=atom" } */ -/* { dg-final { scan-assembler-times "nop" 4 } } */ +/* { dg-final { scan-assembler-times "nop" 4 { target { ! x86_64-*-mingw* } } } } */ +/* { dg-final { scan-assembler-times "nop" 2 { target { x86_64-*-mingw* } } } } */ /* { dg-final { scan-assembler-not "rep" } } */ extern void bar (void); diff --git a/gcc/testsuite/gcc.target/i386/pr22152.c b/gcc/testsuite/gcc.target/i386/pr22152.c index 4fade89..6d24432 100644 --- a/gcc/testsuite/gcc.target/i386/pr22152.c +++ b/gcc/testsuite/gcc.target/i386/pr22152.c @@ -1,6 +1,7 @@ /* { dg-do compile } */ /* { dg-options "-O2 -msse2" } */ /* { dg-options "-O2 -msse2 -mno-vect8-ret-in-mem" { target i?86-*-solaris2.[89] *-*-vxworks* } } */ +/* { dg-additional-options "-mabi=sysv" { target x86_64-*-mingw* } } */ #include diff --git a/gcc/testsuite/gcc.target/i386/pr35767-4.c b/gcc/testsuite/gcc.target/i386/pr35767-4.c index e12f64f..1b58cfd 100644 --- a/gcc/testsuite/gcc.target/i386/pr35767-4.c +++ b/gcc/testsuite/gcc.target/i386/pr35767-4.c @@ -3,7 +3,7 @@ /* { dg-require-effective-target dfp } */ /* { dg-options "-O -march=x86-64 -mtune=generic -std=gnu99" } */ /* { dg-final { scan-assembler-not "movdqu" } } */ -/* { dg-final { scan-assembler "movdqa" } } */ +/* { dg-final { scan-assembler "movdqa" { target { ! x86_64-*-mingw* } } } } */ extern _Decimal128 foo (_Decimal128, _Decimal128, _Decimal128); diff --git a/gcc/testsuite/gcc.target/i386/pr39082-1.c b/gcc/testsuite/gcc.target/i386/pr39082-1.c index f2a1fdf..1d8be2a 100644 --- a/gcc/testsuite/gcc.target/i386/pr39082-1.c +++ b/gcc/testsuite/gcc.target/i386/pr39082-1.c @@ -1,6 +1,7 @@ /* PR target/39082 */ /* { dg-do compile { target { ! { ia32 } } } } */ /* { dg-options "-O2" } */ +/* { dg-additional-options "-mabi=sysv" { target x86_64-*-mingw* } } */ union un { diff --git a/gcc/testsuite/gcc.target/i386/pr39162.c b/gcc/testsuite/gcc.target/i386/pr39162.c index 09ea615..c549106 100644 --- a/gcc/testsuite/gcc.target/i386/pr39162.c +++ b/gcc/testsuite/gcc.target/i386/pr39162.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2 -Wno-psabi -msse2 -mno-avx" } */ +/* { dg-additional-options "-mabi=sysv" { target x86_64-*-mingw* } } */ typedef long long __m256i __attribute__ ((__vector_size__ (32), __may_alias__)); diff --git a/gcc/testsuite/gcc.target/i386/pr39315-3.c b/gcc/testsuite/gcc.target/i386/pr39315-3.c index 07862db..3b61ad0 100644 --- a/gcc/testsuite/gcc.target/i386/pr39315-3.c +++ b/gcc/testsuite/gcc.target/i386/pr39315-3.c @@ -4,7 +4,7 @@ /* { dg-final { scan-assembler-not "movups" } } */ /* { dg-final { scan-assembler-not "movlps" } } */ /* { dg-final { scan-assembler-not "movhps" } } */ -/* { dg-final { scan-assembler "and\[lq\]?\[\\t \]*\\$-128,\[\\t \]*%\[re\]?sp" } } */ +/* { dg-final { scan-assembler "and\[lq\]?\[\\t \]*\\$-128,\[\\t \]*%\[re\]?sp" { target { ! x86_64-*-mingw* } } } } */ /* { dg-final { scan-assembler "movaps" } } */ typedef float __m128 __attribute__ ((__vector_size__ (16))); diff --git a/gcc/testsuite/gcc.target/i386/pr44130.c b/gcc/testsuite/gcc.target/i386/pr44130.c index 5c18bfa..3e50c7b 100644 --- a/gcc/testsuite/gcc.target/i386/pr44130.c +++ b/gcc/testsuite/gcc.target/i386/pr44130.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2 -ftree-vectorize -mavx -mtune=generic" } */ +/* { dg-skip-if "" { x86_64-*-mingw* } { "*" } { "" } } */ /* { dg-final { scan-assembler "and\[lq\]?\[\\t \]*\\$-32,\[\\t \]*%\[re\]?sp" } } */ /* { dg-final { scan-assembler "vmovaps\[\\t \]*%ymm" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr45336-1.c b/gcc/testsuite/gcc.target/i386/pr45336-1.c index e2b4f65..db6c940 100644 --- a/gcc/testsuite/gcc.target/i386/pr45336-1.c +++ b/gcc/testsuite/gcc.target/i386/pr45336-1.c @@ -8,7 +8,7 @@ /* { dg-final { scan-assembler-not "cwtl" } } */ /* { dg-final { scan-assembler "pextrb" } } */ /* { dg-final { scan-assembler "pextrw" } } */ -/* { dg-final { scan-assembler "pextrd" } } */ +/* { dg-final { scan-assembler "pextrd" { target { ! x86_64-*-mingw* } } } } */ #include unsigned int foo8(__m128i x) { return _mm_extract_epi8(x, 4); } diff --git a/gcc/testsuite/gcc.target/i386/pr45336-2.c b/gcc/testsuite/gcc.target/i386/pr45336-2.c index 45d93b7..3e51591 100644 --- a/gcc/testsuite/gcc.target/i386/pr45336-2.c +++ b/gcc/testsuite/gcc.target/i386/pr45336-2.c @@ -9,7 +9,7 @@ /* { dg-final { scan-assembler-not "cltq" } } */ /* { dg-final { scan-assembler "pextrb" } } */ /* { dg-final { scan-assembler "pextrw" } } */ -/* { dg-final { scan-assembler "pextrd" } } */ +/* { dg-final { scan-assembler "pextrd" { target { ! x86_64-*-mingw* } } } } */ #include unsigned long long int foo8(__m128i x) { return _mm_extract_epi8(x, 4); } diff --git a/gcc/testsuite/gcc.target/i386/pr45336-3.c b/gcc/testsuite/gcc.target/i386/pr45336-3.c index 055e314..b2168c0 100644 --- a/gcc/testsuite/gcc.target/i386/pr45336-3.c +++ b/gcc/testsuite/gcc.target/i386/pr45336-3.c @@ -5,7 +5,7 @@ /* { dg-final { scan-assembler "(movswl|cwtl)" } } */ /* { dg-final { scan-assembler "pextrb" } } */ /* { dg-final { scan-assembler "pextrw" } } */ -/* { dg-final { scan-assembler "pextrd" } } */ +/* { dg-final { scan-assembler "pextrd" { target { ! x86_64-*-mingw* } } } } */ #include int foo8(__m128i x) { return (char) _mm_extract_epi8(x, 4); } diff --git a/gcc/testsuite/gcc.target/i386/pr45336-4.c b/gcc/testsuite/gcc.target/i386/pr45336-4.c index c9850e5..8b66a6a 100644 --- a/gcc/testsuite/gcc.target/i386/pr45336-4.c +++ b/gcc/testsuite/gcc.target/i386/pr45336-4.c @@ -6,7 +6,7 @@ /* { dg-final { scan-assembler "(cltq|movslq)" } } */ /* { dg-final { scan-assembler "pextrb" } } */ /* { dg-final { scan-assembler "pextrw" } } */ -/* { dg-final { scan-assembler "pextrd" } } */ +/* { dg-final { scan-assembler "pextrd" { target { ! x86_64-*-mingw* } } } } */ #include long long int foo8(__m128i x) { return (char) _mm_extract_epi8(x, 4); } diff --git a/gcc/testsuite/gcc.target/i386/pr45352-2.c b/gcc/testsuite/gcc.target/i386/pr45352-2.c index 5f9ebb1..52e5522 100644 --- a/gcc/testsuite/gcc.target/i386/pr45352-2.c +++ b/gcc/testsuite/gcc.target/i386/pr45352-2.c @@ -4,6 +4,8 @@ typedef char uint8_t; typedef uint32_t; typedef vo_frame_t; +__extension__ typedef __SIZE_TYPE__ size_t; + struct vo_frame_s { uint8_t base[3]; @@ -43,7 +45,7 @@ mpeg2dec_accel_t; static int bitstream_init (picture_t * picture, void *start) { picture->bitstream_ptr = start; - return (int) (long) start; + return (int) (size_t) start; } static slice_xvmc_init (picture_t * picture, int code) { @@ -56,7 +58,7 @@ static slice_xvmc_init (picture_t * picture, int code) picture->f_motion.ref [0] [0] - = (char) (long) (forward_reference_frame->base + (offset ? picture->pitches[0] : 0)); + = (char) (size_t) (forward_reference_frame->base + (offset ? picture->pitches[0] : 0)); picture->f_motion.ref[0][1] = (offset); if (picture->picture_structure) picture->pitches[0] <<= picture->pitches[1] <<= 1; @@ -91,7 +93,7 @@ void mpeg2_xvmc_slice (mpeg2dec_accel_t * accel, picture_t * picture, int code, uint8_t buffer,int mba_inc) { - xine_xvmc_t * xvmc = (xine_xvmc_t *) (long) bitstream_init (picture, (void *) (long) buffer); + xine_xvmc_t * xvmc = (xine_xvmc_t *) (size_t) bitstream_init (picture, (void *) (size_t) buffer); slice_xvmc_init (picture, code); while (1) { diff --git a/gcc/testsuite/gcc.target/i386/pr46295.c b/gcc/testsuite/gcc.target/i386/pr46295.c index 219f34e..b7fccb7 100644 --- a/gcc/testsuite/gcc.target/i386/pr46295.c +++ b/gcc/testsuite/gcc.target/i386/pr46295.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O3 -mavx -mtune=generic -dp" } */ +/* { dg-additional-options "-mabi=sysv" { target x86_64-*-mingw* } } */ typedef double EXPRESS[5]; void Parse_Rel_Factor (EXPRESS Express,int *Terms); diff --git a/gcc/testsuite/gcc.target/i386/pr46470.c b/gcc/testsuite/gcc.target/i386/pr46470.c index 4035d1a..11eb51a 100644 --- a/gcc/testsuite/gcc.target/i386/pr46470.c +++ b/gcc/testsuite/gcc.target/i386/pr46470.c @@ -6,7 +6,8 @@ transformed to push+pop. We also want to force unwind info updates. */ /* { dg-options "-Os -fomit-frame-pointer -fasynchronous-unwind-tables" } */ /* { dg-options "-Os -fomit-frame-pointer -mpreferred-stack-boundary=3 -fasynchronous-unwind-tables" { target ia32 } } */ - +/* ms_abi has reserved stack-region. */ +/* { dg-skip-if "" { x86_64-*-mingw* } { "*" } { "" } } */ void f(); void g() { f(); f(); } diff --git a/gcc/testsuite/gcc.target/i386/pr46939.c b/gcc/testsuite/gcc.target/i386/pr46939.c index 2f50e37..0fd8607 100644 --- a/gcc/testsuite/gcc.target/i386/pr46939.c +++ b/gcc/testsuite/gcc.target/i386/pr46939.c @@ -1,5 +1,8 @@ /* { dg-do compile } */ /* { dg-options "-O2" } */ + +__extension__ typedef __SIZE_TYPE__ size_t; + int php_filter_parse_int (char const *str, unsigned int str_len, long *ret) { @@ -23,7 +26,7 @@ php_filter_parse_int (char const *str, unsigned int str_len, long *ret) default:; break; } - if ((unsigned long) str < (unsigned long) end) + if ((size_t) str < (size_t) end) { if ((int const) *str >= 49) { @@ -59,7 +62,7 @@ php_filter_parse_int (char const *str, unsigned int str_len, long *ret) { return (-1); } - while ((unsigned long) str < (unsigned long) end) + while ((size_t) str < (size_t) end) { if ((int const) *str >= 48) { diff --git a/gcc/testsuite/gcc.target/i386/sse2-mul-1.c b/gcc/testsuite/gcc.target/i386/sse2-mul-1.c index 5c792e8..9cdc127 100644 --- a/gcc/testsuite/gcc.target/i386/sse2-mul-1.c +++ b/gcc/testsuite/gcc.target/i386/sse2-mul-1.c @@ -14,6 +14,11 @@ #include +/* mingw runtime don't provide random(). */ +#ifdef __MINGW32__ +#define random rand +#endif + #define N 512 static short a1[N], a2[N], a3[N]; static unsigned short b1[N], b2[N], b3[N]; diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-blendps-2.c b/gcc/testsuite/gcc.target/i386/sse4_1-blendps-2.c index d569acf..8fe71b7 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-blendps-2.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-blendps-2.c @@ -8,6 +8,11 @@ #include #include +/* mingw runtime don't provide random(). */ +#ifdef __MINGW32__ +#define random rand +#endif + #define NUM 20 #undef MASK diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-blendps.c b/gcc/testsuite/gcc.target/i386/sse4_1-blendps.c index aa073f3..3f4b335 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-blendps.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-blendps.c @@ -16,6 +16,11 @@ #include #include +/* mingw runtime don't provide random(). */ +#ifdef __MINGW32__ +#define random rand +#endif + #define NUM 20 #ifndef MASK diff --git a/gcc/testsuite/gcc.target/i386/sw-1.c b/gcc/testsuite/gcc.target/i386/sw-1.c index 483d117..fcb1bbd 100644 --- a/gcc/testsuite/gcc.target/i386/sw-1.c +++ b/gcc/testsuite/gcc.target/i386/sw-1.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2 -fshrink-wrap -fdump-rtl-pro_and_epilogue" } */ +/* { dg-skip-if "No shrink-wrapping preformed" { x86_64-*-mingw* } { "*" } { "" } } */ #include diff --git a/gcc/testsuite/gcc.target/i386/wrfsbase-1.c b/gcc/testsuite/gcc.target/i386/wrfsbase-1.c index 8b55ce6..dc15038 100644 --- a/gcc/testsuite/gcc.target/i386/wrfsbase-1.c +++ b/gcc/testsuite/gcc.target/i386/wrfsbase-1.c @@ -1,6 +1,6 @@ /* { dg-do compile { target { ! { ia32 } } } } */ /* { dg-options "-O2 -mfsgsbase" } */ -/* { dg-final { scan-assembler "wrfsbase\[ \t]+(%|)edi" } } */ +/* { dg-final { scan-assembler "wrfsbase\[ \t]+(%|)(edi|ecx)" } } */ #include diff --git a/gcc/testsuite/gcc.target/i386/wrfsbase-2.c b/gcc/testsuite/gcc.target/i386/wrfsbase-2.c index 5accd79..fc4a7b5 100644 --- a/gcc/testsuite/gcc.target/i386/wrfsbase-2.c +++ b/gcc/testsuite/gcc.target/i386/wrfsbase-2.c @@ -1,6 +1,6 @@ /* { dg-do compile { target { ! { ia32 } } } } */ /* { dg-options "-O2 -mfsgsbase" } */ -/* { dg-final { scan-assembler "wrfsbase\[ \t]+(%|)rdi" } } */ +/* { dg-final { scan-assembler "wrfsbase\[ \t]+(%|)(rdi|rcx)" } } */ #include diff --git a/gcc/testsuite/gcc.target/i386/wrgsbase-1.c b/gcc/testsuite/gcc.target/i386/wrgsbase-1.c index 20cd945..5474288 100644 --- a/gcc/testsuite/gcc.target/i386/wrgsbase-1.c +++ b/gcc/testsuite/gcc.target/i386/wrgsbase-1.c @@ -1,6 +1,6 @@ /* { dg-do compile { target { ! { ia32 } } } } */ /* { dg-options "-O2 -mfsgsbase" } */ -/* { dg-final { scan-assembler "wrgsbase\[ \t]+(%|)edi" } } */ +/* { dg-final { scan-assembler "wrgsbase\[ \t]+(%|)(edi|ecx)" } } */ #include diff --git a/gcc/testsuite/gcc.target/i386/wrgsbase-2.c b/gcc/testsuite/gcc.target/i386/wrgsbase-2.c index 52a3c34..cf94750 100644 --- a/gcc/testsuite/gcc.target/i386/wrgsbase-2.c +++ b/gcc/testsuite/gcc.target/i386/wrgsbase-2.c @@ -1,6 +1,6 @@ /* { dg-do compile { target { ! { ia32 } } } } */ /* { dg-options "-O2 -mfsgsbase" } */ -/* { dg-final { scan-assembler "wrgsbase\[ \t]+(%|)rdi" } } */ +/* { dg-final { scan-assembler "wrgsbase\[ \t]+(%|)(rdi|rcx)" } } */ #include diff --git a/gcc/testsuite/gcc.target/i386/xop-vshift-1.c b/gcc/testsuite/gcc.target/i386/xop-vshift-1.c index 01198e8..ee3d299 100644 --- a/gcc/testsuite/gcc.target/i386/xop-vshift-1.c +++ b/gcc/testsuite/gcc.target/i386/xop-vshift-1.c @@ -19,6 +19,11 @@ #define TYPE2 long long #endif +/* mingw runtime don't provide random(). */ +#ifdef __MINGW32__ +#define random rand +#endif + signed TYPE1 a[N], b[N], g[N]; unsigned TYPE1 c[N], h[N]; signed TYPE2 d[N], e[N], j[N]; -- 2.7.4