From ba6a9c6899b2dce3c615ce9fac6bead976e43a48 Mon Sep 17 00:00:00 2001 From: Aharon Landau Date: Tue, 12 Apr 2022 10:23:59 +0300 Subject: [PATCH] RDMA/mlx5: Simplify get_umr_update_access_mask() Instead of getting the update access capabilities each call to get_umr_update_access_mask(), pass struct mlx5_ib_dev and get the capabilities inside the function. Link: https://lore.kernel.org/r/f22b8a84ef32e29ada26691f06b57e2ed5943b76.1649747695.git.leonro@nvidia.com Signed-off-by: Aharon Landau Reviewed-by: Michael Guralnik Signed-off-by: Leon Romanovsky Signed-off-by: Jason Gunthorpe --- drivers/infiniband/hw/mlx5/umr.c | 15 +++++---------- 1 file changed, 5 insertions(+), 10 deletions(-) diff --git a/drivers/infiniband/hw/mlx5/umr.c b/drivers/infiniband/hw/mlx5/umr.c index d3626a9..8131501 100644 --- a/drivers/infiniband/hw/mlx5/umr.c +++ b/drivers/infiniband/hw/mlx5/umr.c @@ -34,9 +34,7 @@ static __be64 get_umr_update_translation_mask(void) return cpu_to_be64(result); } -static __be64 get_umr_update_access_mask(int atomic, - int relaxed_ordering_write, - int relaxed_ordering_read) +static __be64 get_umr_update_access_mask(struct mlx5_ib_dev *dev) { u64 result; @@ -45,13 +43,13 @@ static __be64 get_umr_update_access_mask(int atomic, MLX5_MKEY_MASK_RR | MLX5_MKEY_MASK_RW; - if (atomic) + if (MLX5_CAP_GEN(dev->mdev, atomic)) result |= MLX5_MKEY_MASK_A; - if (relaxed_ordering_write) + if (MLX5_CAP_GEN(dev->mdev, relaxed_ordering_write_umr)) result |= MLX5_MKEY_MASK_RELAXED_ORDERING_WRITE; - if (relaxed_ordering_read) + if (MLX5_CAP_GEN(dev->mdev, relaxed_ordering_read_umr)) result |= MLX5_MKEY_MASK_RELAXED_ORDERING_READ; return cpu_to_be64(result); @@ -116,10 +114,7 @@ int mlx5r_umr_set_umr_ctrl_seg(struct mlx5_ib_dev *dev, if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_TRANSLATION) umr->mkey_mask |= get_umr_update_translation_mask(); if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_PD_ACCESS) { - umr->mkey_mask |= get_umr_update_access_mask( - !!MLX5_CAP_GEN(dev->mdev, atomic), - !!MLX5_CAP_GEN(dev->mdev, relaxed_ordering_write_umr), - !!MLX5_CAP_GEN(dev->mdev, relaxed_ordering_read_umr)); + umr->mkey_mask |= get_umr_update_access_mask(dev); umr->mkey_mask |= get_umr_update_pd_mask(); } if (wr->send_flags & MLX5_IB_SEND_UMR_ENABLE_MR) -- 2.7.4