From ba588d27a4753743909b7e458d133374030c0edc Mon Sep 17 00:00:00 2001 From: Lei Zhang Date: Thu, 3 May 2012 11:58:43 +0800 Subject: [PATCH] Gfx-Display: correct the reg setting of MIPI in driver BZ: 29163 This is a supplement to patch 40888 which correct the MIPI reg 0x61190 setting. The former patch just correct the setting for Video mode; this patch clean the code for MIPI command mode. Change-Id: I41f32409cbdaf9131461cc409b06e7b5bac6e8e4 Signed-off-by: Lei Zhang Reviewed-on: http://android.intel.com:8080/47144 Reviewed-by: Ai, Ke Reviewed-by: Patel, Hitesh K Reviewed-by: Tong, BoX Tested-by: Tong, BoX Reviewed-by: Lu, Faxing Reviewed-by: buildbot Tested-by: buildbot --- drivers/staging/mrst/drv/auo_sc1_cmd.c | 6 +++++- drivers/staging/mrst/drv/gi_sony_cmd.c | 7 ++++++- drivers/staging/mrst/drv/h8c7_cmd.c | 16 ++++++++++++++-- 3 files changed, 25 insertions(+), 4 deletions(-) diff --git a/drivers/staging/mrst/drv/auo_sc1_cmd.c b/drivers/staging/mrst/drv/auo_sc1_cmd.c index 5ec5adb..6d1d39b 100644 --- a/drivers/staging/mrst/drv/auo_sc1_cmd.c +++ b/drivers/staging/mrst/drv/auo_sc1_cmd.c @@ -43,6 +43,7 @@ mdfld_auo_dsi_controller_init(struct mdfld_dsi_config *dsi_config, struct mdfld_dsi_hw_context *hw_ctx = &dsi_config->dsi_hw_context; struct drm_device *dev = dsi_config->dev; + struct drm_psb_private *dev_priv = dev->dev_private; struct mdfld_dsi_hw_registers *regs = &dsi_config->regs; int lane_count = dsi_config->lane_count; @@ -62,7 +63,10 @@ mdfld_auo_dsi_controller_init(struct mdfld_dsi_config *dsi_config, hw_ctx->clk_lane_switch_time_cnt = 0xa0014; hw_ctx->dphy_param = 0x150c3408; hw_ctx->dbi_bw_ctrl = 0x820; - hw_ctx->mipi = 0x810000; + if (dev_priv->platform_rev_id == MDFLD_PNW_A0) + hw_ctx->mipi = PASS_FROM_SPHY_TO_AFE | SEL_FLOPPED_HSTX; + else + hw_ctx->mipi = PASS_FROM_SPHY_TO_AFE; /*set up func_prg*/ hw_ctx->dsi_func_prg = (0xa000 | lane_count); diff --git a/drivers/staging/mrst/drv/gi_sony_cmd.c b/drivers/staging/mrst/drv/gi_sony_cmd.c index 4e9bb44..b0f20c9 100644 --- a/drivers/staging/mrst/drv/gi_sony_cmd.c +++ b/drivers/staging/mrst/drv/gi_sony_cmd.c @@ -218,6 +218,8 @@ mdfld_gi_sony_dsi_controller_init(struct mdfld_dsi_config *dsi_config, { struct mdfld_dsi_hw_context *hw_ctx = &dsi_config->dsi_hw_context; + struct drm_device *dev = dsi_config->dev; + struct drm_psb_private *dev_priv = dev->dev_private; int lane_count = dsi_config->lane_count; PSB_DEBUG_ENTRY("%s: initializing dsi controller on pipe %d\n", @@ -236,7 +238,10 @@ mdfld_gi_sony_dsi_controller_init(struct mdfld_dsi_config *dsi_config, hw_ctx->clk_lane_switch_time_cnt = 0xa0014; hw_ctx->dphy_param = 0x120a2b07; hw_ctx->dbi_bw_ctrl = 0x820; - hw_ctx->mipi = 0x810000; + if (dev_priv->platform_rev_id == MDFLD_PNW_A0) + hw_ctx->mipi = PASS_FROM_SPHY_TO_AFE | SEL_FLOPPED_HSTX; + else + hw_ctx->mipi = PASS_FROM_SPHY_TO_AFE; /*set up func_prg*/ hw_ctx->dsi_func_prg = (0xa000 | lane_count); diff --git a/drivers/staging/mrst/drv/h8c7_cmd.c b/drivers/staging/mrst/drv/h8c7_cmd.c index a4b1867..1d5b54e 100644 --- a/drivers/staging/mrst/drv/h8c7_cmd.c +++ b/drivers/staging/mrst/drv/h8c7_cmd.c @@ -251,6 +251,8 @@ mdfld_h8c7_dci_controller_init(struct mdfld_dsi_config *dsi_config, { struct mdfld_dsi_hw_context *hw_ctx = &dsi_config->dsi_hw_context; + struct drm_device *dev = dsi_config->dev; + struct drm_psb_private *dev_priv = dev->dev_private; int lane_count = dsi_config->lane_count; PSB_DEBUG_ENTRY("%s: initializing dsi controller on pipe %d\n", __func__, pipe); @@ -269,7 +271,12 @@ mdfld_h8c7_dci_controller_init(struct mdfld_dsi_config *dsi_config, hw_ctx->dbi_bw_ctrl = 0x820; hw_ctx->dphy_param = 0x150c3408; - hw_ctx->mipi = 0x810008; + if (dev_priv->platform_rev_id == MDFLD_PNW_A0) + hw_ctx->mipi = PASS_FROM_SPHY_TO_AFE | SEL_FLOPPED_HSTX + | TE_TRIGGER_GPIO_PIN; + else + hw_ctx->mipi = PASS_FROM_SPHY_TO_AFE | + TE_TRIGGER_GPIO_PIN; /*set up func_prg*/ hw_ctx->dsi_func_prg = (0xa000 | lane_count); @@ -1230,6 +1237,7 @@ int mdfld_h8c7_cmd_power_on(struct drm_encoder *encoder) struct mdfld_dsi_hw_registers *regs = NULL; struct mdfld_dsi_hw_context *ctx = NULL; struct drm_device *dev = encoder->dev; + struct drm_psb_private *dev_priv = dev->dev_private; int err = 0; struct mdfld_dsi_pkg_sender *sender = mdfld_dsi_get_pkg_sender(dsi_config); @@ -1249,7 +1257,11 @@ int mdfld_h8c7_cmd_power_on(struct drm_encoder *encoder) /* set low power output hold */ msleep(5); - REG_WRITE(regs->mipi_reg, 0x810000); // ctx->mipi); + if (dev_priv->platform_rev_id == MDFLD_PNW_A0) + REG_WRITE(regs->mipi_reg, + PASS_FROM_SPHY_TO_AFE | SEL_FLOPPED_HSTX); + else + REG_WRITE(regs->mipi_reg, PASS_FROM_SPHY_TO_AFE); msleep(30); /* D-PHY parameter */ REG_WRITE(regs->dphy_param_reg, ctx->dphy_param); -- 2.7.4