From ba486a2a29b629413f89e0490edb02a8ccc3bb8f Mon Sep 17 00:00:00 2001 From: Juha Lumme Date: Wed, 26 Dec 2012 14:48:51 +0900 Subject: [PATCH] mxs/spi: clear XFER_COUNT in ctrl0 field in DMA descriptor On MX23 the XFER_COUNT part in ctrl0 field in DMA descriptor was improperly OR'd during the construction of DMA descriptor chain, instead of being freshly set. Because of that too many bytes were being expected from SPI during the last DMA cycle. This caused a timeout (SSP_TIMEOUT) to happen in the processing of the last DMA descriptor, and thus reads and writes were failing. This is a fix for the problem, by clearing XFER_COUNT bytes in ctrl0 before setting the new XFER_COUNT for DMA descriptor. Signed-off-by: Juha Lumme Acked-by: Marek Vasut Signed-off-by: Grant Likely --- drivers/spi/spi-mxs.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-mxs.c b/drivers/spi/spi-mxs.c index a3ede24..e3d8b31 100644 --- a/drivers/spi/spi-mxs.c +++ b/drivers/spi/spi-mxs.c @@ -241,6 +241,7 @@ static int mxs_spi_txrx_dma(struct mxs_spi *spi, int cs, INIT_COMPLETION(spi->c); ctrl0 = readl(ssp->base + HW_SSP_CTRL0); + ctrl0 &= ~BM_SSP_CTRL0_XFER_COUNT; ctrl0 |= BM_SSP_CTRL0_DATA_XFER | mxs_spi_cs_to_reg(cs); if (*first) @@ -256,8 +257,10 @@ static int mxs_spi_txrx_dma(struct mxs_spi *spi, int cs, if ((sg_count + 1 == sgs) && *last) ctrl0 |= BM_SSP_CTRL0_IGNORE_CRC; - if (ssp->devid == IMX23_SSP) + if (ssp->devid == IMX23_SSP) { + ctrl0 &= ~BM_SSP_CTRL0_XFER_COUNT; ctrl0 |= min; + } dma_xfer[sg_count].pio[0] = ctrl0; dma_xfer[sg_count].pio[3] = min; -- 2.7.4