From b9a3d8b0abef9db969b0a74fef552aef73ac1bf6 Mon Sep 17 00:00:00 2001 From: Rhys Perry Date: Tue, 25 Oct 2022 16:00:10 +0100 Subject: [PATCH] radv/gfx11: don't create texop_samples_identical Signed-off-by: Rhys Perry Reviewed-by: Samuel Pitoiset Part-of: --- src/amd/vulkan/radv_meta.c | 61 +++++++++++++++++++---------------- src/amd/vulkan/radv_meta.h | 2 +- src/amd/vulkan/radv_meta_resolve_cs.c | 3 +- src/amd/vulkan/radv_meta_resolve_fs.c | 3 +- 4 files changed, 38 insertions(+), 31 deletions(-) diff --git a/src/amd/vulkan/radv_meta.c b/src/amd/vulkan/radv_meta.c index f20df89..0e970b7 100644 --- a/src/amd/vulkan/radv_meta.c +++ b/src/amd/vulkan/radv_meta.c @@ -593,11 +593,10 @@ radv_meta_build_nir_fs_noop(struct radv_device *dev) void radv_meta_build_resolve_shader_core(nir_builder *b, bool is_integer, int samples, nir_variable *input_img, nir_variable *color, - nir_ssa_def *img_coord) + nir_ssa_def *img_coord, enum amd_gfx_level gfx_level) { /* do a txf_ms on each sample */ nir_ssa_def *tmp; - bool inserted_if = false; nir_ssa_def *input_img_deref = &nir_build_deref_var(b, input_img)->dest.ssa; @@ -619,7 +618,12 @@ radv_meta_build_resolve_shader_core(nir_builder *b, bool is_integer, int samples tmp = &tex->dest.ssa; - if (!is_integer && samples > 1) { + if (is_integer || samples <= 1) { + nir_store_var(b, color, &tex->dest.ssa, 0xf); + return; + } + + if (gfx_level < GFX11) { nir_tex_instr *tex_all_same = nir_tex_instr_create(b->shader, 2); tex_all_same->sampler_dim = GLSL_SAMPLER_DIM_MS; tex_all_same->op = nir_texop_samples_identical; @@ -636,35 +640,36 @@ radv_meta_build_resolve_shader_core(nir_builder *b, bool is_integer, int samples nir_ssa_def *not_all_same = nir_inot(b, &tex_all_same->dest.ssa); nir_push_if(b, not_all_same); - for (int i = 1; i < samples; i++) { - nir_tex_instr *tex_add = nir_tex_instr_create(b->shader, 3); - tex_add->sampler_dim = GLSL_SAMPLER_DIM_MS; - tex_add->op = nir_texop_txf_ms; - tex_add->src[0].src_type = nir_tex_src_coord; - tex_add->src[0].src = nir_src_for_ssa(img_coord); - tex_add->src[1].src_type = nir_tex_src_ms_index; - tex_add->src[1].src = nir_src_for_ssa(nir_imm_int(b, i)); - tex_add->src[2].src_type = nir_tex_src_texture_deref; - tex_add->src[2].src = nir_src_for_ssa(input_img_deref); - tex_add->dest_type = nir_type_float32; - tex_add->is_array = false; - tex_add->coord_components = 2; - - nir_ssa_dest_init(&tex_add->instr, &tex_add->dest, 4, 32, "tex"); - nir_builder_instr_insert(b, &tex_add->instr); - - tmp = nir_fadd(b, tmp, &tex_add->dest.ssa); - } + } - tmp = nir_fdiv(b, tmp, nir_imm_float(b, samples)); - nir_store_var(b, color, tmp, 0xf); - nir_push_else(b, NULL); - inserted_if = true; + for (int i = 1; i < samples; i++) { + nir_tex_instr *tex_add = nir_tex_instr_create(b->shader, 3); + tex_add->sampler_dim = GLSL_SAMPLER_DIM_MS; + tex_add->op = nir_texop_txf_ms; + tex_add->src[0].src_type = nir_tex_src_coord; + tex_add->src[0].src = nir_src_for_ssa(img_coord); + tex_add->src[1].src_type = nir_tex_src_ms_index; + tex_add->src[1].src = nir_src_for_ssa(nir_imm_int(b, i)); + tex_add->src[2].src_type = nir_tex_src_texture_deref; + tex_add->src[2].src = nir_src_for_ssa(input_img_deref); + tex_add->dest_type = nir_type_float32; + tex_add->is_array = false; + tex_add->coord_components = 2; + + nir_ssa_dest_init(&tex_add->instr, &tex_add->dest, 4, 32, "tex"); + nir_builder_instr_insert(b, &tex_add->instr); + + tmp = nir_fadd(b, tmp, &tex_add->dest.ssa); } - nir_store_var(b, color, &tex->dest.ssa, 0xf); - if (inserted_if) + tmp = nir_fdiv(b, tmp, nir_imm_float(b, samples)); + nir_store_var(b, color, tmp, 0xf); + + if (gfx_level < GFX11) { + nir_push_else(b, NULL); + nir_store_var(b, color, &tex->dest.ssa, 0xf); nir_pop_if(b, NULL); + } } nir_ssa_def * diff --git a/src/amd/vulkan/radv_meta.h b/src/amd/vulkan/radv_meta.h index c06ad68..ee54a9b 100644 --- a/src/amd/vulkan/radv_meta.h +++ b/src/amd/vulkan/radv_meta.h @@ -268,7 +268,7 @@ nir_shader *radv_meta_build_nir_fs_noop(struct radv_device *dev); void radv_meta_build_resolve_shader_core(nir_builder *b, bool is_integer, int samples, nir_variable *input_img, nir_variable *color, - nir_ssa_def *img_coord); + nir_ssa_def *img_coord, enum amd_gfx_level gfx_level); nir_ssa_def *radv_meta_load_descriptor(nir_builder *b, unsigned desc_set, unsigned binding); diff --git a/src/amd/vulkan/radv_meta_resolve_cs.c b/src/amd/vulkan/radv_meta_resolve_cs.c index 20c256e..a6038d1 100644 --- a/src/amd/vulkan/radv_meta_resolve_cs.c +++ b/src/amd/vulkan/radv_meta_resolve_cs.c @@ -88,7 +88,8 @@ build_resolve_compute_shader(struct radv_device *dev, bool is_integer, bool is_s nir_variable *color = nir_local_variable_create(b.impl, glsl_vec4_type(), "color"); - radv_meta_build_resolve_shader_core(&b, is_integer, samples, input_img, color, src_coord); + radv_meta_build_resolve_shader_core(&b, is_integer, samples, input_img, color, src_coord, + dev->physical_device->rad_info.gfx_level); nir_ssa_def *outval = nir_load_var(&b, color); if (is_srgb) diff --git a/src/amd/vulkan/radv_meta_resolve_fs.c b/src/amd/vulkan/radv_meta_resolve_fs.c index 255a402..7aad741 100644 --- a/src/amd/vulkan/radv_meta_resolve_fs.c +++ b/src/amd/vulkan/radv_meta_resolve_fs.c @@ -56,7 +56,8 @@ build_resolve_fragment_shader(struct radv_device *dev, bool is_integer, int samp nir_ssa_def *img_coord = nir_channels(&b, nir_iadd(&b, pos_int, src_offset), 0x3); nir_variable *color = nir_local_variable_create(b.impl, glsl_vec4_type(), "color"); - radv_meta_build_resolve_shader_core(&b, is_integer, samples, input_img, color, img_coord); + radv_meta_build_resolve_shader_core(&b, is_integer, samples, input_img, color, img_coord, + dev->physical_device->rad_info.gfx_level); nir_ssa_def *outval = nir_load_var(&b, color); nir_store_var(&b, color_out, outval, 0xf); -- 2.7.4