From b96a7b5aa58493480358e29e12ebdd0d342bd30e Mon Sep 17 00:00:00 2001
From: Dmitry Vyukov <dvyukov@google.com>
Date: Thu, 4 Oct 2012 10:08:23 +0000
Subject: [PATCH] tsan: add atomic_fetch_sub() and atomic_signal_fence()
 functions

llvm-svn: 165218
---
 compiler-rt/lib/tsan/rtl/tsan_interface_atomic.cc | 30 +++++++++++++++++++++++
 compiler-rt/lib/tsan/rtl/tsan_interface_atomic.h  | 10 ++++++++
 compiler-rt/lib/tsan/rtl/tsan_stat.h              |  1 +
 3 files changed, 41 insertions(+)

diff --git a/compiler-rt/lib/tsan/rtl/tsan_interface_atomic.cc b/compiler-rt/lib/tsan/rtl/tsan_interface_atomic.cc
index 5f79ae0..83b5d25 100644
--- a/compiler-rt/lib/tsan/rtl/tsan_interface_atomic.cc
+++ b/compiler-rt/lib/tsan/rtl/tsan_interface_atomic.cc
@@ -131,6 +131,17 @@ static T AtomicFetchAdd(ThreadState *thr, uptr pc, volatile T *a, T v,
 }
 
 template<typename T>
+static T AtomicFetchSub(ThreadState *thr, uptr pc, volatile T *a, T v,
+    morder mo) {
+  if (IsReleaseOrder(mo))
+    Release(thr, pc, (uptr)a);
+  v = __sync_fetch_and_sub(a, v);
+  if (IsAcquireOrder(mo))
+    Acquire(thr, pc, (uptr)a);
+  return v;
+}
+
+template<typename T>
 static T AtomicFetchAnd(ThreadState *thr, uptr pc, volatile T *a, T v,
     morder mo) {
   if (IsReleaseOrder(mo))
@@ -246,6 +257,22 @@ a64 __tsan_atomic64_fetch_add(volatile a64 *a, a64 v, morder mo) {
   SCOPED_ATOMIC(FetchAdd, a, v, mo);
 }
 
+a8 __tsan_atomic8_fetch_sub(volatile a8 *a, a8 v, morder mo) {
+  SCOPED_ATOMIC(FetchSub, a, v, mo);
+}
+
+a16 __tsan_atomic16_fetch_sub(volatile a16 *a, a16 v, morder mo) {
+  SCOPED_ATOMIC(FetchSub, a, v, mo);
+}
+
+a32 __tsan_atomic32_fetch_sub(volatile a32 *a, a32 v, morder mo) {
+  SCOPED_ATOMIC(FetchSub, a, v, mo);
+}
+
+a64 __tsan_atomic64_fetch_sub(volatile a64 *a, a64 v, morder mo) {
+  SCOPED_ATOMIC(FetchSub, a, v, mo);
+}
+
 a8 __tsan_atomic8_fetch_and(volatile a8 *a, a8 v, morder mo) {
   SCOPED_ATOMIC(FetchAnd, a, v, mo);
 }
@@ -338,3 +365,6 @@ void __tsan_atomic_thread_fence(morder mo) {
   char* a;
   SCOPED_ATOMIC(Fence, mo);
 }
+
+void __tsan_atomic_signal_fence(morder mo) {
+}
diff --git a/compiler-rt/lib/tsan/rtl/tsan_interface_atomic.h b/compiler-rt/lib/tsan/rtl/tsan_interface_atomic.h
index 9b9df51..2fa0021 100644
--- a/compiler-rt/lib/tsan/rtl/tsan_interface_atomic.h
+++ b/compiler-rt/lib/tsan/rtl/tsan_interface_atomic.h
@@ -69,6 +69,15 @@ __tsan_atomic32 __tsan_atomic32_fetch_add(volatile __tsan_atomic32 *a,
 __tsan_atomic64 __tsan_atomic64_fetch_add(volatile __tsan_atomic64 *a,
     __tsan_atomic64 v, __tsan_memory_order mo);
 
+__tsan_atomic8 __tsan_atomic8_fetch_sub(volatile __tsan_atomic8 *a,
+    __tsan_atomic8 v, __tsan_memory_order mo);
+__tsan_atomic16 __tsan_atomic16_fetch_sub(volatile __tsan_atomic16 *a,
+    __tsan_atomic16 v, __tsan_memory_order mo);
+__tsan_atomic32 __tsan_atomic32_fetch_sub(volatile __tsan_atomic32 *a,
+    __tsan_atomic32 v, __tsan_memory_order mo);
+__tsan_atomic64 __tsan_atomic64_fetch_sub(volatile __tsan_atomic64 *a,
+    __tsan_atomic64 v, __tsan_memory_order mo);
+
 __tsan_atomic8 __tsan_atomic8_fetch_and(volatile __tsan_atomic8 *a,
     __tsan_atomic8 v, __tsan_memory_order mo);
 __tsan_atomic16 __tsan_atomic16_fetch_and(volatile __tsan_atomic16 *a,
@@ -115,6 +124,7 @@ int __tsan_atomic64_compare_exchange_strong(volatile __tsan_atomic64 *a,
     __tsan_atomic64 *c, __tsan_atomic64 v, __tsan_memory_order mo);
 
 void __tsan_atomic_thread_fence(__tsan_memory_order mo);
+void __tsan_atomic_signal_fence(__tsan_memory_order mo);
 
 #ifdef __cplusplus
 }  // extern "C"
diff --git a/compiler-rt/lib/tsan/rtl/tsan_stat.h b/compiler-rt/lib/tsan/rtl/tsan_stat.h
index 4ed0e44..16c43f1 100644
--- a/compiler-rt/lib/tsan/rtl/tsan_stat.h
+++ b/compiler-rt/lib/tsan/rtl/tsan_stat.h
@@ -73,6 +73,7 @@ enum StatType {
   StatAtomicStore,
   StatAtomicExchange,
   StatAtomicFetchAdd,
+  StatAtomicFetchSub,
   StatAtomicFetchAnd,
   StatAtomicFetchOr,
   StatAtomicFetchXor,
-- 
2.7.4