From b9240a4abcd1e194dbd80460a9a7632e63fb7f49 Mon Sep 17 00:00:00 2001 From: "Maciej W. Rozycki" Date: Sat, 5 Dec 2020 18:26:25 +0000 Subject: [PATCH] VAX: Actually produce QImode and HImode `ctz' operations The middle end does not refer to `ctzqi2'/`ctzhi2' or `ffsqi2'/`ffshi2' patterns by name where `__builtin_ctz' or `__builtin_ffs' respectively is invoked for an argument of the QImode or HImode type, and instead it extends the data type before passing it to `ctzsi2' or `ffssi2'. Avoid the redundant operation and use a peephole2 to convert it to the right RTL expression that will collapse the two operations into a single machine instruction instead unless we need the extended intermediate result for another purpose. gcc/ * config/vax/builtins.md: Add a peephole2 for QImode and HImode `ctz' operations. (any_extend): New code iterator. gcc/testsuite/ * gcc.target/vax/ctzhi.c: New test. * gcc.target/vax/ctzqi.c: New test. * gcc.target/vax/ffshi.c: New test. * gcc.target/vax/ffsqi.c: New test. --- gcc/config/vax/builtins.md | 22 ++++++++++++++++++++++ gcc/testsuite/gcc.target/vax/ctzhi.c | 20 ++++++++++++++++++++ gcc/testsuite/gcc.target/vax/ctzqi.c | 20 ++++++++++++++++++++ gcc/testsuite/gcc.target/vax/ffshi.c | 24 ++++++++++++++++++++++++ gcc/testsuite/gcc.target/vax/ffsqi.c | 24 ++++++++++++++++++++++++ 5 files changed, 110 insertions(+) create mode 100644 gcc/testsuite/gcc.target/vax/ctzhi.c create mode 100644 gcc/testsuite/gcc.target/vax/ctzqi.c create mode 100644 gcc/testsuite/gcc.target/vax/ffshi.c create mode 100644 gcc/testsuite/gcc.target/vax/ffsqi.c diff --git a/gcc/config/vax/builtins.md b/gcc/config/vax/builtins.md index b7ed976..e96ac3f 100644 --- a/gcc/config/vax/builtins.md +++ b/gcc/config/vax/builtins.md @@ -29,6 +29,8 @@ (define_int_iterator bit [0 1]) (define_int_attr ccss [(0 "cc") (1 "ss")]) +(define_code_iterator any_extend [sign_extend zero_extend]) + (define_expand "ffs2" [(set (match_operand:SI 0 "nonimmediate_operand" "") (ffs:SI (match_operand:VAXint 1 "general_operand" "")))] @@ -57,6 +59,26 @@ "" "ffs $0,$,%1,%0") +;; Our FFS hardware instruction supports any field width, +;; so handle narrower inputs directly as well. +(define_peephole2 + [(set (match_operand:SI 0 "register_operand") + (any_extend:SI (match_operand:VAXintQH 1 "general_operand"))) + (parallel + [(set (match_operand:SI 2 "nonimmediate_operand") + (ctz:SI (match_dup 0))) + (set (cc0) + (compare (match_dup 2) + (const_int 0)))])] + "rtx_equal_p (operands[0], operands[2]) || peep2_reg_dead_p (2, operands[0])" + [(parallel + [(set (match_dup 2) + (ctz:SI (match_dup 1))) + (set (cc0) + (compare (match_dup 1) + (const_int 0)))])] + "") + (define_expand "sync_lock_test_and_set" [(match_operand:VAXint 0 "nonimmediate_operand" "=&g") (match_operand:VAXint 1 "memory_operand" "+m") diff --git a/gcc/testsuite/gcc.target/vax/ctzhi.c b/gcc/testsuite/gcc.target/vax/ctzhi.c new file mode 100644 index 0000000..fcc9f06 --- /dev/null +++ b/gcc/testsuite/gcc.target/vax/ctzhi.c @@ -0,0 +1,20 @@ +/* { dg-do compile } */ +/* { dg-options "-fdump-rtl-peephole2" } */ +/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */ + +typedef unsigned int __attribute__ ((mode (HI))) int_t; + +int +ctzhi (int_t *x) +{ + return __builtin_ctz (*x); +} + +/* Expect assembly like: + + ffs $0,$16,*4(%ap),%r0 + + */ + +/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */ +/* { dg-final { scan-assembler "\tffs \\\$0,\\\$16," } } */ diff --git a/gcc/testsuite/gcc.target/vax/ctzqi.c b/gcc/testsuite/gcc.target/vax/ctzqi.c new file mode 100644 index 0000000..067334b --- /dev/null +++ b/gcc/testsuite/gcc.target/vax/ctzqi.c @@ -0,0 +1,20 @@ +/* { dg-do compile } */ +/* { dg-options "-fdump-rtl-peephole2" } */ +/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */ + +typedef unsigned int __attribute__ ((mode (QI))) int_t; + +int +ctzqi (int_t *x) +{ + return __builtin_ctz (*x); +} + +/* Expect assembly like: + + ffs $0,$8,*4(%ap),%r0 + + */ + +/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */ +/* { dg-final { scan-assembler "\tffs \\\$0,\\\$8," } } */ diff --git a/gcc/testsuite/gcc.target/vax/ffshi.c b/gcc/testsuite/gcc.target/vax/ffshi.c new file mode 100644 index 0000000..db592fb --- /dev/null +++ b/gcc/testsuite/gcc.target/vax/ffshi.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-options "-fdump-rtl-peephole2" } */ +/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */ + +typedef int __attribute__ ((mode (HI))) int_t; + +int +ffshi (int_t *x) +{ + return __builtin_ffs (*x); +} + +/* Expect assembly like: + + ffs $0,$16,*4(%ap),%r0 + jneq .L2 + mnegl $1,%r0 +.L2: + incl %r0 + + */ + +/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */ +/* { dg-final { scan-assembler "\tffs \\\$0,\\\$16," } } */ diff --git a/gcc/testsuite/gcc.target/vax/ffsqi.c b/gcc/testsuite/gcc.target/vax/ffsqi.c new file mode 100644 index 0000000..ebcd946 --- /dev/null +++ b/gcc/testsuite/gcc.target/vax/ffsqi.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-options "-fdump-rtl-peephole2" } */ +/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */ + +typedef int __attribute__ ((mode (QI))) int_t; + +int +ffsqi (int_t *x) +{ + return __builtin_ffs (*x); +} + +/* Expect assembly like: + + ffs $0,$8,*4(%ap),%r0 + jneq .L2 + mnegl $1,%r0 +.L2: + incl %r0 + + */ + +/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */ +/* { dg-final { scan-assembler "\tffs \\\$0,\\\$8," } } */ -- 2.7.4