From b85593476ec497dc246ea9142433d9ea7b24f65d Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Fri, 6 May 2022 15:05:26 +0100 Subject: [PATCH] dt-bindings: sound: add Arm PL041 AACI DT schema The Arm PrimeCell Advanced Audio CODEC Interface (AACI aka PL041) is a peripheral that provides communication with an audio CODEC. Add a simple DT schema binding for it, so that DTs can be validated automatically. Signed-off-by: Andre Przywara Reviewed-by: Krzysztof Kozlowski Signed-off-by: Rob Herring Link: https://lore.kernel.org/r/20220506140533.3566431-5-andre.przywara@arm.com --- .../devicetree/bindings/sound/arm,pl041.yaml | 62 ++++++++++++++++++++++ 1 file changed, 62 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/arm,pl041.yaml diff --git a/Documentation/devicetree/bindings/sound/arm,pl041.yaml b/Documentation/devicetree/bindings/sound/arm,pl041.yaml new file mode 100644 index 0000000..7896b81 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/arm,pl041.yaml @@ -0,0 +1,62 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/arm,pl041.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Arm Ltd. PrimeCell PL041 AACI sound interface + +maintainers: + - Andre Przywara + +description: + The Arm PrimeCell Advanced Audio CODEC Interface (AACI) is an AMBA compliant + peripheral that provides communication with an audio CODEC using the AC-link + protocol. + +# We need a select here so we don't match all nodes with 'arm,primecell' +select: + properties: + compatible: + contains: + const: arm,pl041 + required: + - compatible + +properties: + compatible: + items: + - const: arm,pl041 + - const: arm,primecell + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + description: APB register access clock + + clock-names: + const: apb_pclk + +required: + - compatible + - reg + - interrupts + - clocks + +additionalProperties: false + +examples: + - | + audio-controller@40000 { + compatible = "arm,pl041", "arm,primecell"; + reg = <0x040000 0x1000>; + interrupts = <11>; + clocks = <&v2m_clk24mhz>; + clock-names = "apb_pclk"; + }; + +... -- 2.7.4