From b850c468706ef524e557f21486494ff29adb2921 Mon Sep 17 00:00:00 2001 From: yan Date: Wed, 23 Sep 2020 18:29:08 +0800 Subject: [PATCH] Add new resolution supports 1024x768p60hz 1440x900p60hz 640x480p60hz 1280x1024p60hz 800x600p60hz 1680x1050p60hz 1024x600p60hz 2560x1600p60hz 2560x1440p60hz 2560x1080p60hz 1920x1200p60hz 1600x1200p60hz 1600x900p60hz 1360x768p60hz 1280x800p60hz 480x320p60hz 800x480p60hz 1280x480p60hz Signed-off-by: yan --- .../dts/amlogic/partition_mbox_normal_P_64.dtsi | 1 + .../vout/hdmitx/hdmi_common/hdmi_parameters.c | 210 +++++++++++++++-- .../media/vout/hdmitx/hdmi_tx_20/hdmi_tx_main.c | 1 + .../media/vout/hdmitx/hdmi_tx_20/hw/enc_cfg_hw.c | 99 ++++++-- .../media/vout/hdmitx/hdmi_tx_20/hw/hdmi_tx_hw.c | 19 +- .../media/vout/hdmitx/hdmi_tx_20/hw/hw_clk.c | 36 ++- .../media/vout/hdmitx/hdmi_tx_20/hw/hw_g12a.c | 255 +++++++++++++++++++++ drivers/amlogic/media/vout/vout_serve/vout_func.c | 2 +- .../linux/amlogic/media/vout/hdmi_tx/hdmi_common.h | 5 +- 9 files changed, 569 insertions(+), 59 deletions(-) diff --git a/arch/arm/boot/dts/amlogic/partition_mbox_normal_P_64.dtsi b/arch/arm/boot/dts/amlogic/partition_mbox_normal_P_64.dtsi index 13e510e..c5d8938 100644 --- a/arch/arm/boot/dts/amlogic/partition_mbox_normal_P_64.dtsi +++ b/arch/arm/boot/dts/amlogic/partition_mbox_normal_P_64.dtsi @@ -8,6 +8,7 @@ */ #include "firmware_normal.dtsi" +#include "firmware_system.dtsi" / { partitions: partitions{ diff --git a/drivers/amlogic/media/vout/hdmitx/hdmi_common/hdmi_parameters.c b/drivers/amlogic/media/vout/hdmitx/hdmi_common/hdmi_parameters.c index 30305da..3366dd7 100644 --- a/drivers/amlogic/media/vout/hdmitx/hdmi_common/hdmi_parameters.c +++ b/drivers/amlogic/media/vout/hdmitx/hdmi_common/hdmi_parameters.c @@ -1432,7 +1432,7 @@ static struct hdmi_format_para fmt_para_2560x1080p50_64x27 = { }, }; -static struct hdmi_format_para fmt_para_2560x1080p60_64x27 = { +static struct hdmi_format_para fmt_para_vesa_2560x1080p60_64x27 = { .vic = HDMI_2560x1080p60_64x27, .name = "2560x1080p60hz", .sname = "2560x1080p60hz", @@ -1485,6 +1485,7 @@ static struct hdmi_format_para fmt_para_2560x1080p60_64x27 = { static struct hdmi_format_para fmt_para_vesa_640x480p60_4x3 = { .vic = HDMIV_640x480p60hz, .name = "640x480p60hz", + .sname = "640x480p60hz", .pixel_repetition_factor = 0, .progress_mode = 1, .scrambler_en = 0, @@ -1492,7 +1493,7 @@ static struct hdmi_format_para fmt_para_vesa_640x480p60_4x3 = { .tmds_clk = 25175, .timing = { .pixel_freq = 25175, - .h_freq = 26218, + .h_freq = 31469, .v_freq = 59940, .vsync = 60, .vsync_polarity = 0, @@ -1533,6 +1534,7 @@ static struct hdmi_format_para fmt_para_vesa_640x480p60_4x3 = { static struct hdmi_format_para fmt_para_vesa_800x480p60_4x3 = { .vic = HDMIV_800x480p60hz, .name = "800x480p60hz", + .sname = "800x480p60hz", .pixel_repetition_factor = 0, .progress_mode = 1, .scrambler_en = 0, @@ -1578,16 +1580,66 @@ static struct hdmi_format_para fmt_para_vesa_800x480p60_4x3 = { }, }; +static struct hdmi_format_para fmt_para_vesa_1280x480p60_8x3 = { + .vic = HDMIV_1280x480p60hz, + .name = "1280x480p60hz", + .sname = "1280x480p60hz", + .pixel_repetition_factor = 0, + .progress_mode = 1, + .scrambler_en = 0, + .tmds_clk_div40 = 0, + .tmds_clk = 43200, + .timing = { + .pixel_freq = 43200, + .h_freq = 30000, + .v_freq = 60000, + .vsync_polarity = 1, + .hsync_polarity = 1, + .h_active = 1280, + .h_total = 1440, + .h_blank = 160, + .h_front = 48, + .h_sync = 32, + .h_back = 80, + .v_active = 480, + .v_total = 500, + .v_blank = 20, + .v_front = 3, + .v_sync = 7, + .v_back = 10, + .v_sync_ln = 1, + }, + .hdmitx_vinfo = { + .name = "1280x480p60hz", + .mode = VMODE_HDMI, + .width = 1280, + .height = 480, + .field_height = 480, + .aspect_ratio_num = 8, + .aspect_ratio_den = 3, + .sync_duration_num = 60, + .sync_duration_den = 1, + .video_clk = 43200000, + .htotal = 1440, + .vtotal = 500, + .fr_adj_type = VOUT_FR_ADJ_HDMI, + .viu_color_fmt = COLOR_FMT_YUV444, + .viu_mux = VIU_MUX_ENCP, + }, +}; + + static struct hdmi_format_para fmt_para_vesa_800x600p60_4x3 = { .vic = HDMIV_800x600p60hz, .name = "800x600p60hz", + .sname = "800x600p60hz", .pixel_repetition_factor = 0, .progress_mode = 1, .scrambler_en = 0, .tmds_clk_div40 = 0, .tmds_clk = 40000, .timing = { - .pixel_freq = 66666, + .pixel_freq = 40000, .h_freq = 37879, .v_freq = 60317, .vsync = 60, @@ -1617,7 +1669,7 @@ static struct hdmi_format_para fmt_para_vesa_800x600p60_4x3 = { .aspect_ratio_den = 3, .sync_duration_num = 60, .sync_duration_den = 1, - .video_clk = 66666000, + .video_clk = 40000000, .htotal = 1056, .vtotal = 628, .fr_adj_type = VOUT_FR_ADJ_HDMI, @@ -1677,6 +1729,7 @@ static struct hdmi_format_para fmt_para_vesa_852x480p60_213x120 = { static struct hdmi_format_para fmt_para_vesa_854x480p60_427x240 = { .vic = HDMIV_854x480p60hz, .name = "854x480p60hz", + .sname = "1024x600p60hz", .pixel_repetition_factor = 0, .progress_mode = 1, .scrambler_en = 0, @@ -1725,6 +1778,7 @@ static struct hdmi_format_para fmt_para_vesa_854x480p60_427x240 = { static struct hdmi_format_para fmt_para_vesa_1024x600p60_17x10 = { .vic = HDMIV_1024x600p60hz, .name = "1024x600p60hz", + .sname = "1024x768p60hz", .pixel_repetition_factor = 0, .progress_mode = 1, .scrambler_en = 0, @@ -1773,13 +1827,14 @@ static struct hdmi_format_para fmt_para_vesa_1024x600p60_17x10 = { static struct hdmi_format_para fmt_para_vesa_1024x768p60_4x3 = { .vic = HDMIV_1024x768p60hz, .name = "1024x768p60hz", + .sname = "1024x768p60hz", .pixel_repetition_factor = 0, .progress_mode = 1, .scrambler_en = 0, .tmds_clk_div40 = 0, - .tmds_clk = 79500, + .tmds_clk = 65000, .timing = { - .pixel_freq = 79500, + .pixel_freq = 65000, .h_freq = 48360, .v_freq = 60004, .vsync = 60, @@ -1809,7 +1864,7 @@ static struct hdmi_format_para fmt_para_vesa_1024x768p60_4x3 = { .aspect_ratio_den = 3, .sync_duration_num = 60, .sync_duration_den = 1, - .video_clk = 79500000, + .video_clk = 65000000, .htotal = 1344, .vtotal = 806, .fr_adj_type = VOUT_FR_ADJ_HDMI, @@ -1868,6 +1923,7 @@ static struct hdmi_format_para fmt_para_vesa_1152x864p75_4x3 = { static struct hdmi_format_para fmt_para_vesa_1280x768p60_5x3 = { .vic = HDMIV_1280x768p60hz, .name = "1280x768p60hz", + .sname = "1280x800p60hz", .pixel_repetition_factor = 0, .progress_mode = 1, .scrambler_en = 0, @@ -2010,6 +2066,7 @@ static struct hdmi_format_para fmt_para_vesa_1280x960p60_4x3 = { static struct hdmi_format_para fmt_para_vesa_1280x1024p60_5x4 = { .vic = HDMIV_1280x1024p60hz, .name = "1280x1024p60hz", + .sname = "1360x768p60hz", .pixel_repetition_factor = 0, .progress_mode = 1, .scrambler_en = 0, @@ -2017,7 +2074,7 @@ static struct hdmi_format_para fmt_para_vesa_1280x1024p60_5x4 = { .tmds_clk = 108000, .timing = { .pixel_freq = 108000, - .h_freq = 64080, + .h_freq = 63981, .v_freq = 60020, .vsync = 60, .vsync_polarity = 1, @@ -2202,6 +2259,7 @@ static struct hdmi_format_para fmt_para_vesa_1400x1050p60_4x3 = { static struct hdmi_format_para fmt_para_vesa_1440x900p60_8x5 = { .vic = HDMIV_1440x900p60hz, .name = "1440x900p60hz", + .sname = "1440x900p60hz", .pixel_repetition_factor = 0, .progress_mode = 1, .scrambler_en = 0, @@ -2296,9 +2354,106 @@ static struct hdmi_format_para fmt_para_vesa_1440x2560p60_9x16 = { }, }; +static struct hdmi_format_para fmt_para_vesa_2560x1440p60_16x9 = { + .vic = HDMIV_2560x1440p60hz, + .name = "2560x1440p60hz", + .sname = "2560x1440p60hz", + .pixel_repetition_factor = 0, + .progress_mode = 1, + .scrambler_en = 0, + .tmds_clk_div40 = 0, + .tmds_clk = 241500, + .timing = { + .pixel_freq = 241500, + .h_freq = 88790, + .v_freq = 60000, + .vsync = 60, + .vsync_polarity = 1, + .hsync_polarity = 1, + .h_active = 2560, + .h_total = 2720, + .h_blank = 160, + .h_front = 48, + .h_sync = 32, + .h_back = 80, + .v_active = 1440, + .v_total = 1481, + .v_blank = 41, + .v_front = 2, + .v_sync = 5, + .v_back = 34, + .v_sync_ln = 1, + }, + .hdmitx_vinfo = { + .name = "2560x1440p60hz", + .mode = VMODE_HDMI, + .width = 2560, + .height = 1440, + .field_height = 1440, + .aspect_ratio_num = 16, + .aspect_ratio_den = 9, + .sync_duration_num = 60, + .sync_duration_den = 1, + .video_clk = 241500000, + .htotal = 2720, + .vtotal = 1481, + .viu_color_fmt = COLOR_FMT_YUV444, + .viu_mux = VIU_MUX_ENCP, + }, +}; + +static struct hdmi_format_para fmt_para_vesa_480x320p60_4x3 = { + .vic = HDMIV_480x320p60hz, + .name = "480x320p60hz", + .sname = "480x320p60hz", + .pixel_repetition_factor = 0, + .progress_mode = 1, + .scrambler_en = 0, + .tmds_clk_div40 = 0, + .tmds_clk = 25200, + .timing = { + .pixel_freq = 25200, + .frac_freq = 25200, + .h_freq = 31500, + .v_freq = 60000, + .vsync_polarity = 0, /* -VSync */ + .hsync_polarity = 0, /* -HSync */ + .h_active = 480, + .h_total = 800, + .h_blank = 320, + .h_front = 120, + .h_sync = 100, + .h_back = 100, + .v_active = 320, + .v_total = 525, + .v_blank = 205, + .v_front = 8, + .v_sync = 8, + .v_back = 189, + .v_sync_ln = 1, + }, + .hdmitx_vinfo = { + .name = "480x320p60hz", + .mode = VMODE_HDMI, + .width = 480, + .height = 320, + .field_height = 320, + .aspect_ratio_num = 4, + .aspect_ratio_den = 3, + .sync_duration_num = 60, + .sync_duration_den = 1, + .video_clk = 25200000, + .htotal = 800, + .vtotal = 525, + .viu_color_fmt = COLOR_FMT_YUV444, + .viu_mux = VIU_MUX_ENCP, + }, +}; + static struct hdmi_format_para fmt_para_vesa_1600x900p60_16x9 = { .vic = HDMIV_1600x900p60hz, .name = "1600x900p60hz", + .sname = "1600x900p60hz", .pixel_repetition_factor = 0, .progress_mode = 1, .scrambler_en = 0, @@ -2347,6 +2502,7 @@ static struct hdmi_format_para fmt_para_vesa_1600x900p60_16x9 = { static struct hdmi_format_para fmt_para_vesa_1600x1200p60_4x3 = { .vic = HDMIV_1600x1200p60hz, .name = "1600x1200p60hz", + .sname = "1600x1200p60hz", .pixel_repetition_factor = 0, .progress_mode = 1, .scrambler_en = 0, @@ -2395,30 +2551,31 @@ static struct hdmi_format_para fmt_para_vesa_1600x1200p60_4x3 = { static struct hdmi_format_para fmt_para_vesa_1680x1050p60_8x5 = { .vic = HDMIV_1680x1050p60hz, .name = "1680x1050p60hz", + .sname = "1680x1050p60hz", .pixel_repetition_factor = 0, .progress_mode = 1, .scrambler_en = 0, .tmds_clk_div40 = 0, - .tmds_clk = 146250, + .tmds_clk = 119000, .timing = { - .pixel_freq = 146250, - .h_freq = 65340, - .v_freq = 59954, + .pixel_freq = 119000, + .h_freq = 64673, + .v_freq = 59883, .vsync = 60, .vsync_polarity = 1, .hsync_polarity = 1, .h_active = 1680, - .h_total = 2240, - .h_blank = 560, - .h_front = 104, - .h_sync = 176, - .h_back = 280, + .h_total = 1840, + .h_blank = 160, + .h_front = 48, + .h_sync = 32, + .h_back = 80, .v_active = 1050, - .v_total = 1089, - .v_blank = 39, + .v_total = 1080, + .v_blank = 30, .v_front = 3, .v_sync = 6, - .v_back = 30, + .v_back = 21, .v_sync_ln = 1, }, .hdmitx_vinfo = { @@ -2431,9 +2588,9 @@ static struct hdmi_format_para fmt_para_vesa_1680x1050p60_8x5 = { .aspect_ratio_den = 5, .sync_duration_num = 60, .sync_duration_den = 1, - .video_clk = 146250000, - .htotal = 2240, - .vtotal = 1089, + .video_clk = 119000000, + .htotal = 1840, + .vtotal = 1080, .fr_adj_type = VOUT_FR_ADJ_HDMI, .viu_color_fmt = COLOR_FMT_YUV444, .viu_mux = VIU_MUX_ENCP, @@ -2443,6 +2600,7 @@ static struct hdmi_format_para fmt_para_vesa_1680x1050p60_8x5 = { static struct hdmi_format_para fmt_para_vesa_1920x1200p60_8x5 = { .vic = HDMIV_1920x1200p60hz, .name = "1920x1200p60hz", + .sname = "1920x1200p60hz", .pixel_repetition_factor = 0, .progress_mode = 1, .scrambler_en = 0, @@ -2539,6 +2697,7 @@ static struct hdmi_format_para fmt_para_vesa_2160x1200p90_9x5 = { static struct hdmi_format_para fmt_para_vesa_2560x1600p60_8x5 = { .vic = HDMIV_2560x1600p60hz, .name = "2560x1600p60hz", + .sname = "2560x1600p60hz", .pixel_repetition_factor = 0, .progress_mode = 1, .scrambler_en = 0, @@ -2613,9 +2772,12 @@ static struct hdmi_format_para *all_fmt_paras[] = { &fmt_para_3840x2160p50_16x9_y420, &fmt_para_4096x2160p50_256x135_y420, &fmt_para_2560x1080p50_64x27, - &fmt_para_2560x1080p60_64x27, + &fmt_para_vesa_2560x1080p60_64x27, + &fmt_para_vesa_2560x1440p60_16x9, + &fmt_para_vesa_480x320p60_4x3, &fmt_para_vesa_640x480p60_4x3, &fmt_para_vesa_800x480p60_4x3, + &fmt_para_vesa_1280x480p60_8x3, &fmt_para_vesa_800x600p60_4x3, &fmt_para_vesa_852x480p60_213x120, &fmt_para_vesa_854x480p60_427x240, diff --git a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hdmi_tx_main.c b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hdmi_tx_main.c index da820c2..d545885 100644 --- a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hdmi_tx_main.c +++ b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hdmi_tx_main.c @@ -2322,6 +2322,7 @@ static ssize_t show_disp_cap(struct device *dev, pos += snprintf(buf+pos, PAGE_SIZE, "\n"); } } + pos += snprintf(buf + pos, PAGE_SIZE, "1024x768p60hz\n"); } return pos; } diff --git a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/enc_cfg_hw.c b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/enc_cfg_hw.c index cc4cab3..dad9ab1 100644 --- a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/enc_cfg_hw.c +++ b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/enc_cfg_hw.c @@ -780,6 +780,32 @@ static const struct reg_s tvregs_vesa_800x480p60hz[] = { {MREG_END_MARKER, 0}, }; +static const struct reg_s tvregs_vesa_1280x480p_60hz[] = { + {P_ENCP_VIDEO_EN, 0,}, + {P_ENCI_VIDEO_EN, 0,}, + + {P_ENCP_VIDEO_MODE, 0x4040,}, + {P_ENCP_VIDEO_MODE_ADV, 0x18,}, + + {P_ENCP_VIDEO_MAX_PXCNT, 0x59F,}, + {P_ENCP_VIDEO_MAX_LNCNT, 0x1F3,}, + {P_ENCP_VIDEO_HAVON_BEGIN, 0x70,}, + {P_ENCP_VIDEO_HAVON_END, 0x56F,}, + {P_ENCP_VIDEO_VAVON_BLINE, 0x11,}, + {P_ENCP_VIDEO_VAVON_ELINE, 0x1F0,}, + {P_ENCP_VIDEO_HSO_BEGIN, 0x0,}, + {P_ENCP_VIDEO_HSO_END, 0x20,}, + {P_ENCP_VIDEO_VSO_BEGIN, 0x1E,}, + {P_ENCP_VIDEO_VSO_END, 0x32,}, + {P_ENCP_VIDEO_VSO_BLINE, 0x0,}, + {P_ENCP_VIDEO_VSO_ELINE, 0x7,}, + + {P_ENCP_VIDEO_EN, 1,}, + {P_ENCI_VIDEO_EN, 0,}, + {MREG_END_MARKER, 0} +}; + + static const struct reg_s tvregs_vesa_852x480p60hz[] = { {P_VENC_VDAC_SETTING, 0xff,}, {P_ENCP_VIDEO_EN, 0,}, @@ -1223,8 +1249,14 @@ static const struct reg_s tvregs_vesa_1680x1050p60hz[] = { {P_ENCP_VIDEO_HAVON_END, 0x857,}, {P_ENCP_VIDEO_VAVON_BLINE, 0x24,}, {P_ENCP_VIDEO_VAVON_ELINE, 0x43D,}, + {P_ENCP_VIDEO_MAX_PXCNT, 0x72F,}, + {P_ENCP_VIDEO_MAX_LNCNT, 0x437,}, + {P_ENCP_VIDEO_HAVON_BEGIN, 0x70,}, + {P_ENCP_VIDEO_HAVON_END, 0x6FF,}, + {P_ENCP_VIDEO_VAVON_BLINE, 0x1B,}, + {P_ENCP_VIDEO_VAVON_ELINE, 0x434,}, {P_ENCP_VIDEO_HSO_BEGIN, 0x0,}, - {P_ENCP_VIDEO_HSO_END, 0xB0,}, + {P_ENCP_VIDEO_HSO_END, 0x20,}, {P_ENCP_VIDEO_VSO_BEGIN, 0x1E,}, {P_ENCP_VIDEO_VSO_END, 0x32,}, {P_ENCP_VIDEO_VSO_BLINE, 0x0,}, @@ -1309,7 +1341,7 @@ static const struct reg_s tvregs_vesa_2560x1600p60hz[] = { {MREG_END_MARKER, 0} }; -#if 0 /* TODO */ +#if 1 /* TODO */ static const struct reg_s tvregs_vesa_2560x1080p60hz[] = { {P_ENCP_VIDEO_EN, 0,}, {P_ENCI_VIDEO_EN, 0,}, @@ -1317,19 +1349,18 @@ static const struct reg_s tvregs_vesa_2560x1080p60hz[] = { {P_ENCP_VIDEO_MODE, 0x4040,}, {P_ENCP_VIDEO_MODE_ADV, 0x18,}, - {P_ENCP_VIDEO_MAX_PXCNT, 0xA1F,}, - {P_ENCP_VIDEO_MAX_LNCNT, 0x4DC,}, - {P_ENCP_VIDEO_HAVON_BEGIN, 0x218,}, - {P_ENCP_VIDEO_HAVON_END, 0x997,}, - {P_ENCP_VIDEO_VAVON_BLINE, 0x2A,}, - {P_ENCP_VIDEO_VAVON_ELINE, 0x4D9,}, + {P_ENCP_VIDEO_MAX_PXCNT, 0xBB7,}, + {P_ENCP_VIDEO_MAX_LNCNT, 0x44B,}, + {P_ENCP_VIDEO_HAVON_BEGIN, 0xC0,}, + {P_ENCP_VIDEO_HAVON_END, 0xABF,}, + {P_ENCP_VIDEO_VAVON_BLINE, 0x10,}, + {P_ENCP_VIDEO_VAVON_ELINE, 0x447,}, {P_ENCP_VIDEO_HSO_BEGIN, 0x0,}, - {P_ENCP_VIDEO_HSO_END, 0xC8,}, + {P_ENCP_VIDEO_HSO_END, 0x2C,}, {P_ENCP_VIDEO_VSO_BEGIN, 0x1E,}, {P_ENCP_VIDEO_VSO_END, 0x32,}, {P_ENCP_VIDEO_VSO_BLINE, 0x0,}, - {P_ENCP_VIDEO_VSO_ELINE, 0x6,}, - + {P_ENCP_VIDEO_VSO_ELINE, 0x5,}, {P_VPU_VIU_VENC_MUX_CTRL, 0xA}, {P_ENCI_VIDEO_EN, 0}, {MREG_END_MARKER, 0} @@ -1342,24 +1373,50 @@ static const struct reg_s tvregs_vesa_2560x1440p60hz[] = { {P_ENCP_VIDEO_MODE, 0x4040,}, {P_ENCP_VIDEO_MODE_ADV, 0x18,}, - {P_ENCP_VIDEO_MAX_PXCNT, 0xA1F,}, - {P_ENCP_VIDEO_MAX_LNCNT, 0x4DC,}, - {P_ENCP_VIDEO_HAVON_BEGIN, 0x218,}, - {P_ENCP_VIDEO_HAVON_END, 0x997,}, - {P_ENCP_VIDEO_VAVON_BLINE, 0x2A,}, - {P_ENCP_VIDEO_VAVON_ELINE, 0x4D9,}, + {P_ENCP_VIDEO_MAX_PXCNT, 0xA9F,}, + {P_ENCP_VIDEO_MAX_LNCNT, 0x5C8,}, + {P_ENCP_VIDEO_HAVON_BEGIN, 0x70,}, + {P_ENCP_VIDEO_HAVON_END, 0xA6F,}, + {P_ENCP_VIDEO_VAVON_BLINE, 0x27,}, + {P_ENCP_VIDEO_VAVON_ELINE, 0x5C6,}, {P_ENCP_VIDEO_HSO_BEGIN, 0x0,}, - {P_ENCP_VIDEO_HSO_END, 0xC8,}, + {P_ENCP_VIDEO_HSO_END, 0x20,}, {P_ENCP_VIDEO_VSO_BEGIN, 0x1E,}, {P_ENCP_VIDEO_VSO_END, 0x32,}, {P_ENCP_VIDEO_VSO_BLINE, 0x0,}, - {P_ENCP_VIDEO_VSO_ELINE, 0x6,}, + {P_ENCP_VIDEO_VSO_ELINE, 0x5,}, {P_VPU_VIU_VENC_MUX_CTRL, 0xA}, {P_ENCI_VIDEO_EN, 0}, {MREG_END_MARKER, 0} }; +static const struct reg_s tvregs_vesa_480x320p_60hz[] = { + {P_VENC_VDAC_SETTING, 0xff,}, + {P_ENCP_VIDEO_EN, 0,}, + {P_ENCI_VIDEO_EN, 0,}, + + {P_ENCP_VIDEO_MODE, 0x4040,}, + {P_ENCP_VIDEO_MODE_ADV, 0x18,}, + + {P_ENCP_VIDEO_MAX_PXCNT, 0x31F,}, + {P_ENCP_VIDEO_MAX_LNCNT, 0x20C,}, + {P_ENCP_VIDEO_HAVON_BEGIN, 0x64,}, + {P_ENCP_VIDEO_HAVON_END, 0x243,}, + {P_ENCP_VIDEO_VAVON_BLINE, 0xBD,}, + {P_ENCP_VIDEO_VAVON_ELINE, 0x1FC,}, + {P_ENCP_VIDEO_HSO_BEGIN, 0x0,}, + {P_ENCP_VIDEO_HSO_END, 0x64,}, + {P_ENCP_VIDEO_VSO_BEGIN, 0x1E,}, + {P_ENCP_VIDEO_VSO_END, 0x32,}, + {P_ENCP_VIDEO_VSO_BLINE, 0x0,}, + {P_ENCP_VIDEO_VSO_ELINE, 0x8,}, + + {P_ENCP_VIDEO_EN, 1,}, + {P_ENCI_VIDEO_EN, 0,}, + {MREG_END_MARKER, 0} +}; + static const struct reg_s tvregs_vesa_3440x1440p60hz[] = { {P_ENCP_VIDEO_EN, 0,}, {P_ENCI_VIDEO_EN, 0,}, @@ -1428,6 +1485,7 @@ static struct vic_tvregs_set tvregsTab[] = { {HDMI_2560x1080p60_64x27, tvregs_2560x1080p60hz}, {HDMIV_640x480p60hz, tvregs_vesa_640x480p60hz}, {HDMIV_800x480p60hz, tvregs_vesa_800x480p60hz}, + {HDMIV_1280x480p60hz, tvregs_vesa_1280x480p_60hz}, {HDMIV_800x600p60hz, tvregs_vesa_800x600p60hz}, {HDMIV_852x480p60hz, tvregs_vesa_852x480p60hz}, {HDMIV_854x480p60hz, tvregs_vesa_854x480p60hz}, @@ -1450,6 +1508,9 @@ static struct vic_tvregs_set tvregsTab[] = { {HDMIV_1920x1200p60hz, tvregs_vesa_1920x1200p60hz}, {HDMIV_2160x1200p90hz, tvregs_vesa_2160x1200p90hz}, {HDMIV_2560x1600p60hz, tvregs_vesa_2560x1600p60hz}, + {HDMIV_2560x1440p60hz, tvregs_vesa_2560x1440p60hz}, + {HDMIV_2560x1080p60hz, tvregs_vesa_2560x1080p60hz}, + {HDMIV_480x320p60hz, tvregs_vesa_480x320p_60hz}, }; /* diff --git a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hdmi_tx_hw.c b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hdmi_tx_hw.c index 6e4faac..3199b5f 100644 --- a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hdmi_tx_hw.c +++ b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hdmi_tx_hw.c @@ -1434,7 +1434,7 @@ static void hdmi_tvenc_set(struct hdmitx_vidpara *param) struct hdmi_format_para *hdmi_encp_para = NULL; struct hdmi_cea_timing *hdmi_encp_timing = NULL; - if ((param->VIC & HDMITX_VESA_OFFSET) == HDMITX_VESA_OFFSET) { + if(param->VIC >= HDMITX_VESA_OFFSET) { /* VESA modes setting */ hdmi_tvenc_vesa_set(param); return; @@ -1646,6 +1646,23 @@ static void hdmi_tvenc_set(struct hdmitx_vidpara *param) SOF_LINES = hdmi_encp_timing->v_back; TOTAL_FRAMES = 4; break; + case HDMIV_1024x768p60hz: + printk("jason hdmi_tvenc_set \n"); + INTERLACE_MODE = 0; + PIXEL_REPEAT_VENC = 0; + PIXEL_REPEAT_HDMI = 0; + ACTIVE_PIXELS = (1024*(1+PIXEL_REPEAT_HDMI)); + ACTIVE_LINES = (768/(1+INTERLACE_MODE)); + LINES_F0 = 806; + LINES_F1 = 806; + FRONT_PORCH = 24; + HSYNC_PIXELS = 136; + BACK_PORCH = 160; + EOF_LINES = 3; + VSYNC_LINES = 6; + SOF_LINES = 29; + TOTAL_FRAMES = 4; + break; default: break; } diff --git a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hw_clk.c b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hw_clk.c index f56e3cd..abd53df 100644 --- a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hw_clk.c +++ b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hw_clk.c @@ -795,63 +795,75 @@ static struct hw_enc_clk_val_group setting_enc_clk_val_24[] = { /* pll setting for VESA modes */ {{HDMIV_640x480p60hz, /* 4.028G / 16 = 251.75M */ HDMI_VIC_END}, - 4028000, 4, 4, 1, VID_PLL_DIV_5, 2, 1, 1, -1}, + 251750, 4, 4, 1, VID_PLL_DIV_5, 2, 1, 1, -1}, {{HDMIV_800x480p60hz, HDMI_VIC_END}, - 4761600, 4, 4, 1, VID_PLL_DIV_5, 2, 1, 1, -1}, + 297600, 4, 4, 1, VID_PLL_DIV_5, 2, 1, 1, -1}, + {{HDMIV_1280x480p60hz, + HDMI_VIC_END}, + 432000, 4, 2, 1, VID_PLL_DIV_5, 2, 1, 1, -1}, {{HDMIV_800x600p60hz, HDMI_VIC_END}, - 3200000, 4, 2, 1, VID_PLL_DIV_5, 2, 1, 1, -1}, + 400000, 4, 2, 1, VID_PLL_DIV_5, 2, 1, 1, -1}, {{HDMIV_852x480p60hz, HDMIV_854x480p60hz, HDMI_VIC_END}, 4838400, 4, 4, 1, VID_PLL_DIV_5, 2, 1, 1, -1}, {{HDMIV_1024x600p60hz, HDMI_VIC_END}, - 4115866, 4, 2, 1, VID_PLL_DIV_5, 2, 1, 1, -1}, + 504000, 4, 2, 1, VID_PLL_DIV_5, 2, 1, 1, -1}, {{HDMIV_1024x768p60hz, HDMI_VIC_END}, - 5200000, 4, 2, 1, VID_PLL_DIV_5, 2, 1, 1, -1}, + 650000, 4, 2, 1, VID_PLL_DIV_5, 2, 1, 1, -1}, {{HDMIV_1280x768p60hz, HDMI_VIC_END}, 3180000, 4, 1, 1, VID_PLL_DIV_5, 2, 1, 1, -1}, {{HDMIV_1280x800p60hz, HDMI_VIC_END}, - 5680000, 4, 2, 1, VID_PLL_DIV_5, 2, 1, 1, -1}, + 835000, 4, 2, 1, VID_PLL_DIV_5, 2, 1, 1, -1}, {{HDMIV_1152x864p75hz, HDMIV_1280x960p60hz, HDMIV_1280x1024p60hz, HDMIV_1600x900p60hz, HDMI_VIC_END}, - 4320000, 4, 1, 1, VID_PLL_DIV_5, 2, 1, 1, -1}, + 1080000, 4, 1, 1, VID_PLL_DIV_5, 2, 1, 1, -1}, {{HDMIV_1600x1200p60hz, HDMI_VIC_END}, - 3240000, 2, 1, 1, VID_PLL_DIV_5, 2, 1, 1, -1}, + 1620000, 2, 1, 1, VID_PLL_DIV_5, 2, 1, 1, -1}, {{HDMIV_1360x768p60hz, HDMIV_1366x768p60hz, HDMI_VIC_END}, - 3420000, 4, 1, 1, VID_PLL_DIV_5, 2, 1, 1, -1}, + 855000, 4, 1, 1, VID_PLL_DIV_5, 2, 1, 1, -1}, {{HDMIV_1400x1050p60hz, HDMI_VIC_END}, 4870000, 4, 1, 1, VID_PLL_DIV_5, 2, 1, 1, -1}, {{HDMIV_1440x900p60hz, HDMI_VIC_END}, - 4260000, 4, 1, 1, VID_PLL_DIV_5, 2, 1, 1, -1}, + 1065000, 4, 1, 1, VID_PLL_DIV_5, 2, 1, 1, -1}, {{HDMIV_1440x2560p60hz, HDMI_VIC_END}, 4897000, 2, 1, 1, VID_PLL_DIV_5, 2, 1, 1, -1}, {{HDMIV_1680x1050p60hz, HDMI_VIC_END}, - 5850000, 4, 1, 1, VID_PLL_DIV_5, 2, 1, 1, -1}, + 1190000, 4, 1, 1, VID_PLL_DIV_5, 2, 1, 1, -1}, {{HDMIV_1920x1200p60hz, HDMI_VIC_END}, - 3865000, 2, 1, 1, VID_PLL_DIV_5, 2, 1, 1, -1}, + 1932500, 2, 1, 1, VID_PLL_DIV_5, 2, 1, 1, -1}, {{HDMIV_2160x1200p90hz, HDMI_VIC_END}, 5371100, 1, 2, 2, VID_PLL_DIV_5, 1, 1, 1, -1}, {{HDMIV_2560x1600p60hz, HDMI_VIC_END}, 3485000, 1, 1, 1, VID_PLL_DIV_5, 2, 1, 1, -1}, + {{HDMIV_2560x1080p60hz, + HDMI_VIC_END}, + 1980000, 2, 1, 1, VID_PLL_DIV_5, 2, 1, 1, -1}, + {{HDMIV_2560x1440p60hz, + HDMI_VIC_END}, + 2415000, 2, 1, 1, VID_PLL_DIV_5, 2, 1, 1, -1}, + {{HDMIV_480x320p60hz, + HDMI_VIC_END}, + 252000, 4, 4, 1, VID_PLL_DIV_5, 2, 1, 1, -1}, }; /* For colordepth 10bits */ diff --git a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hw_g12a.c b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hw_g12a.c index dcf7a2f..e8c381c 100644 --- a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hw_g12a.c +++ b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hw_g12a.c @@ -323,6 +323,261 @@ void set_g12a_hpll_clk_out(unsigned int frac_rate, unsigned int clk) WAIT_FOR_PLL_LOCKED(P_HHI_HDMI_PLL_CNTL0); pr_info("HPLL: 0x%x\n", hd_read_reg(P_HHI_HDMI_PLL_CNTL0)); break; + case 650000: + hd_write_reg(P_HHI_HDMI_PLL_CNTL0, 0x3b0004d8); + if (frac_rate) + hd_write_reg(P_HHI_HDMI_PLL_CNTL1, 0x0001ffff); + else + hd_write_reg(P_HHI_HDMI_PLL_CNTL1, 0x00018000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL2, 0x00000000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL3, 0x0a691c00); + hd_write_reg(P_HHI_HDMI_PLL_CNTL4, 0x33771290); + hd_write_reg(P_HHI_HDMI_PLL_CNTL5, 0x39270000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL6, 0x50540000); + hd_set_reg_bits(P_HHI_HDMI_PLL_CNTL0, 0x0, 29, 1); + WAIT_FOR_PLL_LOCKED(P_HHI_HDMI_PLL_CNTL0); + pr_info("HPLL: 0x%x\n", hd_read_reg(P_HHI_HDMI_PLL_CNTL0)); + break; + case 1065000: + hd_write_reg(P_HHI_HDMI_PLL_CNTL0, 0x3b0004b1); + if (frac_rate) + hd_write_reg(P_HHI_HDMI_PLL_CNTL1, 0x0001ffff); + else + hd_write_reg(P_HHI_HDMI_PLL_CNTL1, 0x00018000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL2, 0x00000000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL3, 0x0a691c00); + hd_write_reg(P_HHI_HDMI_PLL_CNTL4, 0x33771290); + hd_write_reg(P_HHI_HDMI_PLL_CNTL5, 0x39270000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL6, 0x50540000); + hd_set_reg_bits(P_HHI_HDMI_PLL_CNTL0, 0x0, 29, 1); + WAIT_FOR_PLL_LOCKED(P_HHI_HDMI_PLL_CNTL0); + pr_info("HPLL: 0x%x\n", hd_read_reg(P_HHI_HDMI_PLL_CNTL0)); + break; + case 251750: + hd_write_reg(P_HHI_HDMI_PLL_CNTL0, 0x3b0004a7); + if (frac_rate) + hd_write_reg(P_HHI_HDMI_PLL_CNTL1, 0x0001ffff); + else + hd_write_reg(P_HHI_HDMI_PLL_CNTL1, 0x00018000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL2, 0x00000000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL3, 0x0a691c00); + hd_write_reg(P_HHI_HDMI_PLL_CNTL4, 0x33771290); + hd_write_reg(P_HHI_HDMI_PLL_CNTL5, 0x39270000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL6, 0x50540000); + hd_set_reg_bits(P_HHI_HDMI_PLL_CNTL0, 0x0, 29, 1); + WAIT_FOR_PLL_LOCKED(P_HHI_HDMI_PLL_CNTL0); + pr_info("HPLL: 0x%x\n", hd_read_reg(P_HHI_HDMI_PLL_CNTL0)); + break; + case 1080000://1600x900 1280x1024 + hd_write_reg(P_HHI_HDMI_PLL_CNTL0, 0x3b0004b3); + if (frac_rate) + hd_write_reg(P_HHI_HDMI_PLL_CNTL1, 0x0001ffff); + else + hd_write_reg(P_HHI_HDMI_PLL_CNTL1, 0x00018000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL2, 0x00000000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL3, 0x0a691c00); + hd_write_reg(P_HHI_HDMI_PLL_CNTL4, 0x33771290); + hd_write_reg(P_HHI_HDMI_PLL_CNTL5, 0x39270000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL6, 0x50540000); + hd_set_reg_bits(P_HHI_HDMI_PLL_CNTL0, 0x0, 29, 1); + WAIT_FOR_PLL_LOCKED(P_HHI_HDMI_PLL_CNTL0); + pr_info("HPLL: 0x%x\n", hd_read_reg(P_HHI_HDMI_PLL_CNTL0)); + break; + case 400000: + hd_write_reg(P_HHI_HDMI_PLL_CNTL0, 0x3b000485);//133 + if (frac_rate) + hd_write_reg(P_HHI_HDMI_PLL_CNTL1, 0x0001ffff); + else + hd_write_reg(P_HHI_HDMI_PLL_CNTL1, 0x00018000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL2, 0x00000000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL3, 0x0a691c00); + hd_write_reg(P_HHI_HDMI_PLL_CNTL4, 0x33771290); + hd_write_reg(P_HHI_HDMI_PLL_CNTL5, 0x39270000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL6, 0x50540000); + hd_set_reg_bits(P_HHI_HDMI_PLL_CNTL0, 0x0, 29, 1); + WAIT_FOR_PLL_LOCKED(P_HHI_HDMI_PLL_CNTL0); + pr_info("HPLL: 0x%x\n", hd_read_reg(P_HHI_HDMI_PLL_CNTL0)); + break; + case 1190000: + hd_write_reg(P_HHI_HDMI_PLL_CNTL0, 0x3b0004C6);//198 + if (frac_rate) + hd_write_reg(P_HHI_HDMI_PLL_CNTL1, 0x0001ffff); + else + hd_write_reg(P_HHI_HDMI_PLL_CNTL1, 0x00018000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL2, 0x00000000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL3, 0x0a691c00); + hd_write_reg(P_HHI_HDMI_PLL_CNTL4, 0x33771290); + hd_write_reg(P_HHI_HDMI_PLL_CNTL5, 0x39270000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL6, 0x50540000); + hd_set_reg_bits(P_HHI_HDMI_PLL_CNTL0, 0x0, 29, 1); + WAIT_FOR_PLL_LOCKED(P_HHI_HDMI_PLL_CNTL0); + pr_info("HPLL: 0x%x\n", hd_read_reg(P_HHI_HDMI_PLL_CNTL0)); + break; + case 504000://1024x600 + hd_write_reg(P_HHI_HDMI_PLL_CNTL0, 0x3b0004A7); + if (frac_rate) + hd_write_reg(P_HHI_HDMI_PLL_CNTL1, 0x0001ffff); + else + hd_write_reg(P_HHI_HDMI_PLL_CNTL1, 0x00018000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL2, 0x00000000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL3, 0x0a691c00); + hd_write_reg(P_HHI_HDMI_PLL_CNTL4, 0x33771290); + hd_write_reg(P_HHI_HDMI_PLL_CNTL5, 0x39270000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL6, 0x50540000); + hd_set_reg_bits(P_HHI_HDMI_PLL_CNTL0, 0x0, 29, 1); + WAIT_FOR_PLL_LOCKED(P_HHI_HDMI_PLL_CNTL0); + pr_info("HPLL: 0x%x\n", hd_read_reg(P_HHI_HDMI_PLL_CNTL0)); + break; + case 3485000://2560x1600 + hd_write_reg(P_HHI_HDMI_PLL_CNTL0, 0x3b000491); + if (frac_rate) + hd_write_reg(P_HHI_HDMI_PLL_CNTL1, 0x0001ffff); + else + hd_write_reg(P_HHI_HDMI_PLL_CNTL1, 0x00018000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL2, 0x00000000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL3, 0x0a691c00); + hd_write_reg(P_HHI_HDMI_PLL_CNTL4, 0x33771290); + hd_write_reg(P_HHI_HDMI_PLL_CNTL5, 0x39270000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL6, 0x50540000); + hd_set_reg_bits(P_HHI_HDMI_PLL_CNTL0, 0x0, 29, 1); + WAIT_FOR_PLL_LOCKED(P_HHI_HDMI_PLL_CNTL0); + pr_info("HPLL: 0x%x\n", hd_read_reg(P_HHI_HDMI_PLL_CNTL0)); + break; + case 2415000: + hd_write_reg(P_HHI_HDMI_PLL_CNTL0, 0x3b0004C8);//2560x1440 + if (frac_rate) + hd_write_reg(P_HHI_HDMI_PLL_CNTL1, 0x0001ffff); + else + hd_write_reg(P_HHI_HDMI_PLL_CNTL1, 0x00018000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL2, 0x00000000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL3, 0x0a691c00); + hd_write_reg(P_HHI_HDMI_PLL_CNTL4, 0x33771290); + hd_write_reg(P_HHI_HDMI_PLL_CNTL5, 0x39270000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL6, 0x50540000); + hd_set_reg_bits(P_HHI_HDMI_PLL_CNTL0, 0x0, 29, 1); + WAIT_FOR_PLL_LOCKED(P_HHI_HDMI_PLL_CNTL0); + pr_info("HPLL: 0x%x\n", hd_read_reg(P_HHI_HDMI_PLL_CNTL0)); + break; + case 1980000://2560x1080 + hd_write_reg(P_HHI_HDMI_PLL_CNTL0, 0x3b0004A5); + if (frac_rate) + hd_write_reg(P_HHI_HDMI_PLL_CNTL1, 0x0001ffff); + else + hd_write_reg(P_HHI_HDMI_PLL_CNTL1, 0x00018000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL2, 0x00000000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL3, 0x0a691c00); + hd_write_reg(P_HHI_HDMI_PLL_CNTL4, 0x33771290); + hd_write_reg(P_HHI_HDMI_PLL_CNTL5, 0x39270000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL6, 0x50540000); + hd_set_reg_bits(P_HHI_HDMI_PLL_CNTL0, 0x0, 29, 1); + WAIT_FOR_PLL_LOCKED(P_HHI_HDMI_PLL_CNTL0); + pr_info("HPLL: 0x%x\n", hd_read_reg(P_HHI_HDMI_PLL_CNTL0)); + break; + case 1932500://1920x1200 + hd_write_reg(P_HHI_HDMI_PLL_CNTL0, 0x3b0004A1); + if (frac_rate) + hd_write_reg(P_HHI_HDMI_PLL_CNTL1, 0x0001ffff); + else + hd_write_reg(P_HHI_HDMI_PLL_CNTL1, 0x00018000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL2, 0x00000000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL3, 0x0a691c00); + hd_write_reg(P_HHI_HDMI_PLL_CNTL4, 0x33771290); + hd_write_reg(P_HHI_HDMI_PLL_CNTL5, 0x39270000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL6, 0x50540000); + hd_set_reg_bits(P_HHI_HDMI_PLL_CNTL0, 0x0, 29, 1); + WAIT_FOR_PLL_LOCKED(P_HHI_HDMI_PLL_CNTL0); + pr_info("HPLL: 0x%x\n", hd_read_reg(P_HHI_HDMI_PLL_CNTL0)); + break; + case 1620000://1600x1200 + hd_write_reg(P_HHI_HDMI_PLL_CNTL0, 0x3b000486); + if (frac_rate) + hd_write_reg(P_HHI_HDMI_PLL_CNTL1, 0x0001ffff); + else + hd_write_reg(P_HHI_HDMI_PLL_CNTL1, 0x00018000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL2, 0x00000000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL3, 0x0a691c00); + hd_write_reg(P_HHI_HDMI_PLL_CNTL4, 0x33771290); + hd_write_reg(P_HHI_HDMI_PLL_CNTL5, 0x39270000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL6, 0x50540000); + hd_set_reg_bits(P_HHI_HDMI_PLL_CNTL0, 0x0, 29, 1); + WAIT_FOR_PLL_LOCKED(P_HHI_HDMI_PLL_CNTL0); + pr_info("HPLL: 0x%x\n", hd_read_reg(P_HHI_HDMI_PLL_CNTL0)); + break; + case 855000://1360x768 + hd_write_reg(P_HHI_HDMI_PLL_CNTL0, 0x3b00048E); + if (frac_rate) + hd_write_reg(P_HHI_HDMI_PLL_CNTL1, 0x0001ffff); + else + hd_write_reg(P_HHI_HDMI_PLL_CNTL1, 0x00018000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL2, 0x00000000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL3, 0x0a691c00); + hd_write_reg(P_HHI_HDMI_PLL_CNTL4, 0x33771290); + hd_write_reg(P_HHI_HDMI_PLL_CNTL5, 0x39270000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL6, 0x50540000); + hd_set_reg_bits(P_HHI_HDMI_PLL_CNTL0, 0x0, 29, 1); + WAIT_FOR_PLL_LOCKED(P_HHI_HDMI_PLL_CNTL0); + pr_info("HPLL: 0x%x\n", hd_read_reg(P_HHI_HDMI_PLL_CNTL0)); + break; + case 835000: + hd_write_reg(P_HHI_HDMI_PLL_CNTL0, 0x3b00048B);//1280x800 + if (frac_rate) + hd_write_reg(P_HHI_HDMI_PLL_CNTL1, 0x0001ffff); + else + hd_write_reg(P_HHI_HDMI_PLL_CNTL1, 0x00018000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL2, 0x00000000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL3, 0x0a691c00); + hd_write_reg(P_HHI_HDMI_PLL_CNTL4, 0x33771290); + hd_write_reg(P_HHI_HDMI_PLL_CNTL5, 0x39270000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL6, 0x50540000); + hd_set_reg_bits(P_HHI_HDMI_PLL_CNTL0, 0x0, 29, 1); + WAIT_FOR_PLL_LOCKED(P_HHI_HDMI_PLL_CNTL0); + pr_info("HPLL: 0x%x\n", hd_read_reg(P_HHI_HDMI_PLL_CNTL0)); + break; + case 252000: + hd_write_reg(P_HHI_HDMI_PLL_CNTL0, 0x3b0004A8);//480X320 + if (frac_rate) + hd_write_reg(P_HHI_HDMI_PLL_CNTL1, 0x0001ffff); + else + hd_write_reg(P_HHI_HDMI_PLL_CNTL1, 0x00018000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL2, 0x00000000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL3, 0x0a691c00); + hd_write_reg(P_HHI_HDMI_PLL_CNTL4, 0x33771290); + hd_write_reg(P_HHI_HDMI_PLL_CNTL5, 0x39270000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL6, 0x50540000); + hd_set_reg_bits(P_HHI_HDMI_PLL_CNTL0, 0x0, 29, 1); + WAIT_FOR_PLL_LOCKED(P_HHI_HDMI_PLL_CNTL0); + pr_info("HPLL: 0x%x\n", hd_read_reg(P_HHI_HDMI_PLL_CNTL0)); + break; + case 297600: + hd_write_reg(P_HHI_HDMI_PLL_CNTL0, 0x3b0004C6);//800x480 + if (frac_rate) + hd_write_reg(P_HHI_HDMI_PLL_CNTL1, 0x0001cccc); + else + hd_write_reg(P_HHI_HDMI_PLL_CNTL1, 0x00018000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL2, 0x00000000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL3, 0x0a691c00); + hd_write_reg(P_HHI_HDMI_PLL_CNTL4, 0x33771290); + hd_write_reg(P_HHI_HDMI_PLL_CNTL5, 0x39270000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL6, 0x50540000); + hd_set_reg_bits(P_HHI_HDMI_PLL_CNTL0, 0x0, 29, 1); + WAIT_FOR_PLL_LOCKED(P_HHI_HDMI_PLL_CNTL0); + pr_info("HPLL: 0x%x\n", hd_read_reg(P_HHI_HDMI_PLL_CNTL0)); + break; + case 432000: + hd_write_reg(P_HHI_HDMI_PLL_CNTL0, 0x3b000490);//1280x480 + if (frac_rate) + hd_write_reg(P_HHI_HDMI_PLL_CNTL1, 0x0001ffff); + else + hd_write_reg(P_HHI_HDMI_PLL_CNTL1, 0x00018000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL2, 0x00000000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL3, 0x0a691c00); + hd_write_reg(P_HHI_HDMI_PLL_CNTL4, 0x33771290); + hd_write_reg(P_HHI_HDMI_PLL_CNTL5, 0x39270000); + hd_write_reg(P_HHI_HDMI_PLL_CNTL6, 0x50540000); + hd_set_reg_bits(P_HHI_HDMI_PLL_CNTL0, 0x0, 29, 1); + WAIT_FOR_PLL_LOCKED(P_HHI_HDMI_PLL_CNTL0); + pr_info("HPLL: 0x%x\n", hd_read_reg(P_HHI_HDMI_PLL_CNTL0)); + break; default: pr_info("error hpll clk: %d\n", clk); break; diff --git a/drivers/amlogic/media/vout/vout_serve/vout_func.c b/drivers/amlogic/media/vout/vout_serve/vout_func.c index c8661b3..c9d76b3 100644 --- a/drivers/amlogic/media/vout/vout_serve/vout_func.c +++ b/drivers/amlogic/media/vout/vout_serve/vout_func.c @@ -245,7 +245,7 @@ void vout_func_update_viu(int index) if (clk_bit < 0xff) vout_func_vcbus_setb(VPU_VENCX_CLK_CTRL, clk_sel, clk_bit, 1); -#if 0 +#if 1 VOUTPR("%s: %d, mux_sel=%d, clk_sel=%d\n", __func__, index, mux_sel, clk_sel); #endif diff --git a/include/linux/amlogic/media/vout/hdmi_tx/hdmi_common.h b/include/linux/amlogic/media/vout/hdmi_tx/hdmi_common.h index e640616..2a6b1d5 100644 --- a/include/linux/amlogic/media/vout/hdmi_tx/hdmi_common.h +++ b/include/linux/amlogic/media/vout/hdmi_tx/hdmi_common.h @@ -27,8 +27,7 @@ */ #define HDMITX_VIC420_OFFSET 0x100 #define HDMITX_VIC420_FAKE_OFFSET 0x200 -#define HDMITX_VESA_OFFSET 0x300 - +#define HDMITX_VESA_OFFSET 0x301 #define HDMITX_VIC_MASK 0xff @@ -183,6 +182,7 @@ enum hdmi_vic { HDMI_VIC_FAKE = HDMITX_VIC420_FAKE_OFFSET, HDMIV_640x480p60hz = HDMITX_VESA_OFFSET, HDMIV_800x480p60hz, + HDMIV_1280x480p60hz, HDMIV_800x600p60hz, HDMIV_852x480p60hz, HDMIV_854x480p60hz, @@ -208,6 +208,7 @@ enum hdmi_vic { HDMIV_2560x1440p60hz, HDMIV_2560x1600p60hz, HDMIV_3440x1440p60hz, + HDMIV_480x320p60hz, HDMI_VIC_END, }; -- 2.7.4