From b7efa4f5cdb4c44311483ffacc1cfe235af28b25 Mon Sep 17 00:00:00 2001 From: Wesley Chalmers Date: Wed, 20 May 2020 15:32:31 -0400 Subject: [PATCH] drm/amd/display: Move call to disable DPG [WHY] Disabling DPG should happen after setting watermarks and clocks Signed-off-by: Wesley Chalmers Reviewed-by: Tony Cheng Acked-by: Qingqing Zhuo Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/display/dc/core/dc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c index 5b7466a..49dd310 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc.c @@ -1248,7 +1248,6 @@ static enum dc_status dc_commit_state_no_check(struct dc *dc, struct dc_state *c int i, k, l; struct dc_stream_state *dc_streams[MAX_STREAMS] = {0}; - disable_dangling_plane(dc, context); for (i = 0; i < context->stream_count; i++) dc_streams[i] = context->streams[i]; @@ -1264,6 +1263,7 @@ static enum dc_status dc_commit_state_no_check(struct dc *dc, struct dc_state *c if (dc->optimize_seamless_boot_streams == 0) dc->hwss.prepare_bandwidth(dc, context); + disable_dangling_plane(dc, context); /* re-program planes for existing stream, in case we need to * free up plane resource for later use */ -- 2.7.4