From b7e312dea1d8378b8f311ce9096759b5accb1939 Mon Sep 17 00:00:00 2001 From: Trent Piepho Date: Tue, 5 Feb 2019 00:17:39 +0000 Subject: [PATCH] dt-bindings: imx6q-pcie: Add description of imx7d pcie phy There is a separate PHY device with its own registers on imx7d. It's currently unused, but a PCIe erratum on imx7d will require it for the workaround. Signed-off-by: Trent Piepho Signed-off-by: Lorenzo Pieralisi Acked-by: Lucas Stach --- Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt index 920ca93..954f435 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt @@ -54,6 +54,7 @@ Additional required properties for imx7d-pcie and imx8mq-pcie: - "pciephy" - "apps" - "turnoff" +- fsl,imx7d-pcie-phy: A phandle to an fsl,imx7d-pcie-phy node. Example: @@ -80,3 +81,13 @@ Example: clocks = <&clks 144>, <&clks 206>, <&clks 189>; clock-names = "pcie", "pcie_bus", "pcie_phy"; }; + +* Freescale i.MX7d PCIe PHY + +This is the PHY associated with the IMX7d PCIe controller. It's used by the +PCI-e controller via the fsl,imx7d-pcie-phy phandle. + +Required properties: +- compatible: + - "fsl,imx7d-pcie-phy" +- reg: base address and length of the PCIe PHY controller -- 2.7.4