From b7ab83d59fd44f8a2120874818fd0c09031aa635 Mon Sep 17 00:00:00 2001 From: Danylo Piliaiev Date: Tue, 14 Feb 2023 19:24:59 +0100 Subject: [PATCH] ir3: Consider dst type in ubo_vec4 to ldc lowering The dst type could be either 16b or 32b. Fixes validation failure in dEQP-VK.subgroups.* tests which deal with 16b types. validation fail: (type_size(instr->cat6.type) <= 16) == !!((instr->dsts[0])->flags & IR3_REG_HALF) -> for instruction: MESA: info: 0023:0000:000: ldc.offset0.base0 hssa_23 (wrmask=0x3), ssa_1, ssa_22 Signed-off-by: Danylo Piliaiev Part-of: --- src/freedreno/ir3/ir3_compiler_nir.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/freedreno/ir3/ir3_compiler_nir.c b/src/freedreno/ir3/ir3_compiler_nir.c index 986762a..89a5d78 100644 --- a/src/freedreno/ir3/ir3_compiler_nir.c +++ b/src/freedreno/ir3/ir3_compiler_nir.c @@ -881,7 +881,7 @@ emit_intrinsic_load_ubo_ldc(struct ir3_context *ctx, nir_intrinsic_instr *intr, ldc->dsts[0]->wrmask = MASK(ncomp); ldc->cat6.iim_val = ncomp; ldc->cat6.d = nir_intrinsic_component(intr); - ldc->cat6.type = TYPE_U32; + ldc->cat6.type = utype_dst(intr->dest); ir3_handle_bindless_cat6(ldc, intr->src[0]); if (ldc->flags & IR3_INSTR_B) -- 2.7.4