From b786a05f6ce4ff29ff9ef438c6111f339672f88d Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Wed, 28 Aug 2019 09:55:14 +0200 Subject: [PATCH] ARM: dts: ux500: Update thermal zone After moving the DB8500 thermal driver to use device tree we define the default thermal zone for the Ux500 in the device tree replacing the oldstyle hardcoded trigger points. This default thermal zone utilizes the cpufreq driver (using the generic OF cpufreq back-end) as a passive cooling device, and defines a critical trip point when the temperature goes above 85 degrees celsius which will (hopefully) make the system shut down if the temperature cannot be controlled. This default policy can later be augmented for specific subdevices if these have tighter temperature conditions. After this patch we get: /sys/class/thermal/thermal_zone0 (CPU thermal zone) This reports the rough temperature and trip points from the thermal zone in the device tree. By executing two yes > /dev/null & jobs fully utilizing the two CPU cores we can notice the temperature climbing in the thermal zone in response and falling when we kill the jobs. /syc/class/thermal/cooling_device0 (cpufreq cooling) this reports all 4 available cpufreq frequencies as states. Suggested-by: Daniel Lezcano Signed-off-by: Linus Walleij --- arch/arm/boot/dts/ste-dbx5x0.dtsi | 57 ++++++++++++++++++++++++--------------- 1 file changed, 36 insertions(+), 21 deletions(-) diff --git a/arch/arm/boot/dts/ste-dbx5x0.dtsi b/arch/arm/boot/dts/ste-dbx5x0.dtsi index 527ee57..a53657b 100644 --- a/arch/arm/boot/dts/ste-dbx5x0.dtsi +++ b/arch/arm/boot/dts/ste-dbx5x0.dtsi @@ -43,6 +43,7 @@ clocks = <&prcmu_clk PRCMU_ARMSS>; clock-names = "cpu"; clock-latency = <20000>; + #cooling-cells = <2>; }; CPU1: cpu@301 { device_type = "cpu"; @@ -51,6 +52,39 @@ }; }; + thermal-zones { + /* + * Thermal zone for the SoC, using the thermal sensor in the + * PRCMU for temperature and the cpufreq driver for passive + * cooling. + */ + cpu_thermal: cpu-thermal { + polling-delay-passive = <0>; + polling-delay = <1000>; + + thermal-sensors = <&thermal>; + + trips { + cpu_alert: cpu-alert { + temperature = <70000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu-crit { + temperature = <85000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling-maps { + trip = <&cpu_alert>; + cooling-device = <&CPU0 0 2>; + contribution = <100>; + }; + }; + }; + soc { #address-cells = <1>; #size-cells = <1>; @@ -501,33 +535,14 @@ reg = <0x80157450 0xC>; }; - thermal@801573c0 { + thermal: thermal@801573c0 { compatible = "stericsson,db8500-thermal"; reg = <0x801573c0 0x40>; interrupt-parent = <&prcmu>; interrupts = <21 IRQ_TYPE_LEVEL_HIGH>, <22 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "IRQ_HOTMON_LOW", "IRQ_HOTMON_HIGH"; - num-trips = <4>; - - trip0-temp = <70000>; - trip0-type = "active"; - trip0-cdev-num = <1>; - trip0-cdev-name0 = "thermal-cpufreq-0"; - - trip1-temp = <75000>; - trip1-type = "active"; - trip1-cdev-num = <1>; - trip1-cdev-name0 = "thermal-cpufreq-0"; - - trip2-temp = <80000>; - trip2-type = "active"; - trip2-cdev-num = <1>; - trip2-cdev-name0 = "thermal-cpufreq-0"; - - trip3-temp = <85000>; - trip3-type = "critical"; - trip3-cdev-num = <0>; + #thermal-sensor-cells = <0>; }; db8500-prcmu-regulators { -- 2.7.4