From b74cc639f796ecc0b43b23424ee33d9a56dfa468 Mon Sep 17 00:00:00 2001 From: Sander Vanheule Date: Sun, 15 Jan 2023 13:19:22 +0100 Subject: [PATCH] mips: Realtek RTL: select NO_EXCEPT_FILL The CPUs in these SoCs support MIPS32 R2, and allow ebase relocation. Even if the default exception base of 0x80000000 is used, the MIPS_GENERIC load address of 0x80100000 leaves sufficient space to not need an extra 0x400 bytes of padding. Suggested-by: Olliver Schinagl Signed-off-by: Sander Vanheule Signed-off-by: Thomas Bogendoerfer --- arch/mips/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 15cb692..37072e1 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -445,6 +445,7 @@ config LANTIQ select IRQ_MIPS_CPU select CEVT_R4K select CSRC_R4K + select NO_EXCEPT_FILL select SYS_HAS_CPU_MIPS32_R1 select SYS_HAS_CPU_MIPS32_R2 select SYS_SUPPORTS_BIG_ENDIAN -- 2.7.4