From b747fa226910179a1b78818f97358b788f5cb532 Mon Sep 17 00:00:00 2001 From: Frank Wunderlich Date: Tue, 25 Oct 2022 15:29:50 +0200 Subject: [PATCH] arm64: dts: mediatek: mt2712e: swap last 2 clocks to match binding First 3 clocks for mt2712 need to be "source", "hclk", "source_cg" so swap last 2 of mmc0 to match the binding. Signed-off-by: Frank Wunderlich Reviewed-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20221025132953.81286-4-linux@fw-web.de Signed-off-by: Matthias Brugger --- arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi index e6d7453..9dc0794 100644 --- a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi @@ -766,9 +766,9 @@ interrupts = ; clocks = <&pericfg CLK_PERI_MSDC30_0>, <&pericfg CLK_PERI_MSDC50_0_HCLK_EN>, - <&pericfg CLK_PERI_MSDC30_0_QTR_EN>, - <&pericfg CLK_PERI_MSDC50_0_EN>; - clock-names = "source", "hclk", "bus_clk", "source_cg"; + <&pericfg CLK_PERI_MSDC50_0_EN>, + <&pericfg CLK_PERI_MSDC30_0_QTR_EN>; + clock-names = "source", "hclk", "source_cg", "bus_clk"; status = "disabled"; }; -- 2.7.4