From b734735fcaca60e8f07b040cd8a700f6fabe5b39 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Christian=20L=C3=BCtke-Stetzkamp?= Date: Wed, 4 Apr 2018 22:15:29 +0200 Subject: [PATCH] staging: mt7621-mmc: Remove code for different soc types MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Remove code that is intended for soc other then the mt7621 because this driver is only for that soc. This also removes some conditions. However the remaining code is also at the wrong place, it just selects the mode of the pins, this is a job for pinctl not for the sdxc driver. Signed-off-by: Christian Lütke-Stetzkamp Signed-off-by: Greg Kroah-Hartman --- drivers/staging/mt7621-mmc/sd.c | 25 ++++--------------------- 1 file changed, 4 insertions(+), 21 deletions(-) diff --git a/drivers/staging/mt7621-mmc/sd.c b/drivers/staging/mt7621-mmc/sd.c index 518ede6..6f57d92 100644 --- a/drivers/staging/mt7621-mmc/sd.c +++ b/drivers/staging/mt7621-mmc/sd.c @@ -2987,27 +2987,10 @@ static int __init mt_msdc_init(void) printk("MTK MSDC device init.\n"); mtk_sd_device.dev.platform_data = &msdc0_hw; - if (ralink_soc == MT762X_SOC_MT7620A || ralink_soc == MT762X_SOC_MT7621AT) { -//#if defined (CONFIG_RALINK_MT7620) || defined (CONFIG_RALINK_MT7621) - reg = sdr_read32((volatile u32 *)(RALINK_SYSCTL_BASE + 0x60)) & ~(0x3 << 18); -//#if defined (CONFIG_RALINK_MT7620) - if (ralink_soc == MT762X_SOC_MT7620A) - reg |= 0x1 << 18; -//#endif - } else { -//#elif defined (CONFIG_RALINK_MT7628) - /* TODO: maybe omitted when RAether already toggle AGPIO_CFG */ - reg = sdr_read32((volatile u32 *)(RALINK_SYSCTL_BASE + 0x3c)); - reg |= 0x1e << 16; - sdr_write32((volatile u32 *)(RALINK_SYSCTL_BASE + 0x3c), reg); - - reg = sdr_read32((volatile u32 *)(RALINK_SYSCTL_BASE + 0x60)) & ~(0x3 << 10); -#if defined(CONFIG_MTK_MMC_EMMC_8BIT) - reg |= 0x3 << 26 | 0x3 << 28 | 0x3 << 30; - msdc0_hw.data_pins = 8, -#endif -//#endif - } + + // Set the pins for sdxc to sdxc mode + //FIXME: this should be done by pinctl and not by the sd driver + reg = sdr_read32((volatile u32 *)(RALINK_SYSCTL_BASE + 0x60)) & ~(0x3 << 18); sdr_write32((volatile u32 *)(RALINK_SYSCTL_BASE + 0x60), reg); //platform_device_register(&mtk_sd_device); /* end of +++ */ -- 2.7.4