From b6fef088533376e16ca6b47f87c6c50f6f6cd014 Mon Sep 17 00:00:00 2001 From: Tarun Prabhu Date: Thu, 21 Jul 2022 10:39:54 -0600 Subject: [PATCH] [flang] Lower F08 merge_bits intrinsic. Lower F08 merge_bits intrinsic. Differential Revision: https://reviews.llvm.org/D129779 --- flang/lib/Lower/IntrinsicCall.cpp | 20 ++++++ flang/test/Lower/Intrinsics/merge_bits.f90 | 110 +++++++++++++++++++++++++++++ 2 files changed, 130 insertions(+) create mode 100644 flang/test/Lower/Intrinsics/merge_bits.f90 diff --git a/flang/lib/Lower/IntrinsicCall.cpp b/flang/lib/Lower/IntrinsicCall.cpp index 6167b28..7d8aac5f 100644 --- a/flang/lib/Lower/IntrinsicCall.cpp +++ b/flang/lib/Lower/IntrinsicCall.cpp @@ -516,6 +516,7 @@ struct IntrinsicLibrary { fir::ExtendedValue genMaxloc(mlir::Type, llvm::ArrayRef); fir::ExtendedValue genMaxval(mlir::Type, llvm::ArrayRef); fir::ExtendedValue genMerge(mlir::Type, llvm::ArrayRef); + mlir::Value genMergeBits(mlir::Type, llvm::ArrayRef); fir::ExtendedValue genMinloc(mlir::Type, llvm::ArrayRef); fir::ExtendedValue genMinval(mlir::Type, llvm::ArrayRef); mlir::Value genMod(mlir::Type, llvm::ArrayRef); @@ -821,6 +822,7 @@ static constexpr IntrinsicHandler handlers[]{ {"mask", asBox, handleDynamicOptional}}}, /*isElemental=*/false}, {"merge", &I::genMerge}, + {"merge_bits", &I::genMergeBits}, {"min", &I::genExtremum}, {"minloc", &I::genMinloc, @@ -3292,6 +3294,24 @@ IntrinsicLibrary::genMerge(mlir::Type, return rslt; } +// MERGE_BITS +mlir::Value IntrinsicLibrary::genMergeBits(mlir::Type resultType, + llvm::ArrayRef args) { + assert(args.size() == 3); + + mlir::Value i = builder.createConvert(loc, resultType, args[0]); + mlir::Value j = builder.createConvert(loc, resultType, args[1]); + mlir::Value mask = builder.createConvert(loc, resultType, args[2]); + mlir::Value ones = builder.createIntegerConstant(loc, resultType, -1); + + // MERGE_BITS(I, J, MASK) = IOR(IAND(I, MASK), IAND(J, NOT(MASK))) + mlir::Value notMask = builder.create(loc, mask, ones); + mlir::Value lft = builder.create(loc, i, mask); + mlir::Value rgt = builder.create(loc, j, notMask); + + return builder.create(loc, lft, rgt); +} + // MOD mlir::Value IntrinsicLibrary::genMod(mlir::Type resultType, llvm::ArrayRef args) { diff --git a/flang/test/Lower/Intrinsics/merge_bits.f90 b/flang/test/Lower/Intrinsics/merge_bits.f90 new file mode 100644 index 0000000..b5c2745 --- /dev/null +++ b/flang/test/Lower/Intrinsics/merge_bits.f90 @@ -0,0 +1,110 @@ +! RUN: bbc -emit-fir %s -o - | FileCheck %s +! RUN: %flang_fc1 -emit-fir %s -o - | FileCheck %s + +! CHECK-LABEL: merge_bits1_test +! CHECK-SAME: %[[IREF:.*]]: !fir.ref{{.*}}, %[[JREF:.*]]: !fir.ref{{.*}}, %[[MREF:.*]]: !fir.ref{{.*}}, %[[RREF:.*]]: !fir.ref{{.*}} +subroutine merge_bits1_test(i, j, m, r) + integer(1) :: i, j, m + integer(1) :: r + + ! CHECK: %[[I:.*]] = fir.load %[[IREF]] : !fir.ref + ! CHECK: %[[J:.*]] = fir.load %[[JREF]] : !fir.ref + ! CHECK: %[[M:.*]] = fir.load %[[MREF]] : !fir.ref + r = merge_bits(i, j, m) + ! CHECK: %[[C__1:.*]] = arith.constant -1 : i8 + ! CHECK: %[[NM:.*]] = arith.xori %[[M]], %[[C__1]] : i8 + ! CHECK: %[[LFT:.*]] = arith.andi %[[I]], %[[M]] : i8 + ! CHECK: %[[RGT:.*]] = arith.andi %[[J]], %[[NM]] : i8 + ! CHECK: %[[RES:.*]] = arith.ori %[[LFT]], %[[RGT]] : i8 + ! CHECK: fir.store %[[RES]] to %[[RREF]] : !fir.ref +end subroutine merge_bits1_test + +! CHECK-LABEL: merge_bits2_test +! CHECK-SAME: %[[IREF:.*]]: !fir.ref{{.*}}, %[[JREF:.*]]: !fir.ref{{.*}}, %[[MREF:.*]]: !fir.ref{{.*}}, %[[RREF:.*]]: !fir.ref{{.*}} +subroutine merge_bits2_test(i, j, m, r) + integer(2) :: i, j, m + integer(2) :: r + + ! CHECK: %[[I:.*]] = fir.load %[[IREF]] : !fir.ref + ! CHECK: %[[J:.*]] = fir.load %[[JREF]] : !fir.ref + ! CHECK: %[[M:.*]] = fir.load %[[MREF]] : !fir.ref + r = merge_bits(i, j, m) + ! CHECK: %[[C__1:.*]] = arith.constant -1 : i16 + ! CHECK: %[[NM:.*]] = arith.xori %[[M]], %[[C__1]] : i16 + ! CHECK: %[[LFT:.*]] = arith.andi %[[I]], %[[M]] : i16 + ! CHECK: %[[RGT:.*]] = arith.andi %[[J]], %[[NM]] : i16 + ! CHECK: %[[RES:.*]] = arith.ori %[[LFT]], %[[RGT]] : i16 + ! CHECK: fir.store %[[RES]] to %[[RREF]] : !fir.ref +end subroutine merge_bits2_test + +! CHECK-LABEL: merge_bits4_test +! CHECK-SAME: %[[IREF:.*]]: !fir.ref{{.*}}, %[[JREF:.*]]: !fir.ref{{.*}}, %[[MREF:.*]]: !fir.ref{{.*}}, %[[RREF:.*]]: !fir.ref{{.*}} +subroutine merge_bits4_test(i, j, m, r) + integer(4) :: i, j, m + integer(4) :: r + + ! CHECK: %[[I:.*]] = fir.load %[[IREF]] : !fir.ref + ! CHECK: %[[J:.*]] = fir.load %[[JREF]] : !fir.ref + ! CHECK: %[[M:.*]] = fir.load %[[MREF]] : !fir.ref + r = merge_bits(i, j, m) + ! CHECK: %[[C__1:.*]] = arith.constant -1 : i32 + ! CHECK: %[[NM:.*]] = arith.xori %[[M]], %[[C__1]] : i32 + ! CHECK: %[[LFT:.*]] = arith.andi %[[I]], %[[M]] : i32 + ! CHECK: %[[RGT:.*]] = arith.andi %[[J]], %[[NM]] : i32 + ! CHECK: %[[RES:.*]] = arith.ori %[[LFT]], %[[RGT]] : i32 + ! CHECK: fir.store %[[RES]] to %[[RREF]] : !fir.ref +end subroutine merge_bits4_test + +! CHECK-LABEL: merge_bits8_test +! CHECK-SAME: %[[IREF:.*]]: !fir.ref{{.*}}, %[[JREF:.*]]: !fir.ref{{.*}}, %[[MREF:.*]]: !fir.ref{{.*}}, %[[RREF:.*]]: !fir.ref{{.*}} +subroutine merge_bits8_test(i, j, m, r) + integer(8) :: i, j, m + integer(8) :: r + + ! CHECK: %[[I:.*]] = fir.load %[[IREF]] : !fir.ref + ! CHECK: %[[J:.*]] = fir.load %[[JREF]] : !fir.ref + ! CHECK: %[[M:.*]] = fir.load %[[MREF]] : !fir.ref + r = merge_bits(i, j, m) + ! CHECK: %[[C__1:.*]] = arith.constant -1 : i64 + ! CHECK: %[[NM:.*]] = arith.xori %[[M]], %[[C__1]] : i64 + ! CHECK: %[[LFT:.*]] = arith.andi %[[I]], %[[M]] : i64 + ! CHECK: %[[RGT:.*]] = arith.andi %[[J]], %[[NM]] : i64 + ! CHECK: %[[RES:.*]] = arith.ori %[[LFT]], %[[RGT]] : i64 + ! CHECK: fir.store %[[RES]] to %[[RREF]] : !fir.ref +end subroutine merge_bits8_test + +! CHECK-LABEL: merge_bitsz0_test +! CHECK-SAME: %[[JREF:.*]]: !fir.ref{{.*}}, %[[MREF:.*]]: !fir.ref{{.*}}, %[[RREF:.*]]: !fir.ref{{.*}} +subroutine merge_bitsz0_test(j, m, r) + integer :: j, m + integer :: r + + ! CHECK: %[[I:.*]] = arith.constant 13 : i32 + ! CHECK: %[[J:.*]] = fir.load %[[JREF]] : !fir.ref + ! CHECK: %[[M:.*]] = fir.load %[[MREF]] : !fir.ref + r = merge_bits(B'1101', j, m) + ! CHECK: %[[C__1:.*]] = arith.constant -1 : i32 + ! CHECK: %[[NM:.*]] = arith.xori %[[M]], %[[C__1]] : i32 + ! CHECK: %[[LFT:.*]] = arith.andi %[[I]], %[[M]] : i32 + ! CHECK: %[[RGT:.*]] = arith.andi %[[J]], %[[NM]] : i32 + ! CHECK: %[[RES:.*]] = arith.ori %[[LFT]], %[[RGT]] : i32 + ! CHECK: fir.store %[[RES]] to %[[RREF]] : !fir.ref +end subroutine merge_bitsz0_test + +! CHECK-LABEL: merge_bitsz1_test +! CHECK-SAME: %[[IREF:.*]]: !fir.ref{{.*}}, %[[MREF:.*]]: !fir.ref{{.*}}, %[[RREF:.*]]: !fir.ref{{.*}} +subroutine merge_bitsz1_test(i, m, r) + integer :: i, m + integer :: r + + ! CHECK: %[[I:.*]] = fir.load %[[IREF]] : !fir.ref + ! CHECK: %[[J:.*]] = arith.constant 13 : i32 + ! CHECK: %[[M:.*]] = fir.load %[[MREF]] : !fir.ref + r = merge_bits(i, Z'0D', m) + ! CHECK: %[[C__1:.*]] = arith.constant -1 : i32 + ! CHECK: %[[NM:.*]] = arith.xori %[[M]], %[[C__1]] : i32 + ! CHECK: %[[LFT:.*]] = arith.andi %[[I]], %[[M]] : i32 + ! CHECK: %[[RGT:.*]] = arith.andi %[[J]], %[[NM]] : i32 + ! CHECK: %[[RES:.*]] = arith.ori %[[LFT]], %[[RGT]] : i32 + ! CHECK: fir.store %[[RES]] to %[[RREF]] : !fir.ref +end subroutine merge_bitsz1_test -- 2.7.4