From b6db6e57d873eb5d37f5e39f91cecf37942b67d4 Mon Sep 17 00:00:00 2001 From: Xingyu Chen Date: Thu, 21 Mar 2019 11:26:09 +0800 Subject: [PATCH] remote: fix compatibility issue for RC5 protocol [1/1] MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit PD#SWPL-6161 Problem: partial ir-keys with RC5 can’t been decoded on some boards(Eg: TL1, TXLX) Solution: adjust the register to extend the detection range of half/whole bit Verify: test pass on TL1 Change-Id: I6ff0af79b3bf9f624c1f249f056b729df7b5dd0c Signed-off-by: Xingyu Chen --- drivers/amlogic/input/remote/remote_regmap.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/amlogic/input/remote/remote_regmap.c b/drivers/amlogic/input/remote/remote_regmap.c index 2d9f424..93c9697 100644 --- a/drivers/amlogic/input/remote/remote_regmap.c +++ b/drivers/amlogic/input/remote/remote_regmap.c @@ -108,9 +108,9 @@ static struct remote_reg_map regs_default_rc5[] = { /*bit[0-3]: RC5; bit[8]: MSB first mode; bit[11]: compare frame method*/ { REG_REG2, ((1 << 13) | (1 << 11) | (1 << 8) | 0x7)}, /*Half bit for RC5 format: 888.89us*/ - { REG_DURATN2, ((49 << 16) | (40 << 0))}, + { REG_DURATN2, ((53 << 16) | (38 << 0))}, /*RC5 typically 1777.78us for whole bit*/ - { REG_DURATN3, ((94 << 16) | (83 << 0))}, + { REG_DURATN3, ((99 << 16) | (81 << 0))}, { REG_REG3, 0} }; -- 2.7.4