From b61adeed5409380479b3a9b43113348c26881342 Mon Sep 17 00:00:00 2001 From: Ping-Ke Shih Date: Fri, 25 Mar 2022 14:00:51 +0800 Subject: [PATCH] rtw89: 8852c: update security engine setting The security setting of 8852A and 8852C are different, so change the settings accordingly. Signed-off-by: Ping-Ke Shih Signed-off-by: Kalle Valo Link: https://lore.kernel.org/r/20220325060055.58482-13-pkshih@realtek.com --- drivers/net/wireless/realtek/rtw89/mac.c | 8 +++++++- drivers/net/wireless/realtek/rtw89/reg.h | 3 +++ 2 files changed, 10 insertions(+), 1 deletion(-) diff --git a/drivers/net/wireless/realtek/rtw89/mac.c b/drivers/net/wireless/realtek/rtw89/mac.c index 6498df5..8e6d459 100644 --- a/drivers/net/wireless/realtek/rtw89/mac.c +++ b/drivers/net/wireless/realtek/rtw89/mac.c @@ -1620,6 +1620,7 @@ static int mpdu_proc_init(struct rtw89_dev *rtwdev) static int sec_eng_init(struct rtw89_dev *rtwdev) { + const struct rtw89_chip_info *chip = rtwdev->chip; u32 val = 0; int ret; @@ -1633,7 +1634,8 @@ static int sec_eng_init(struct rtw89_dev *rtwdev) /* init TX encryption */ val |= (B_AX_SEC_TX_ENC | B_AX_SEC_RX_DEC); val |= (B_AX_MC_DEC | B_AX_BC_DEC); - val &= ~B_AX_TX_PARTIAL_MODE; + if (chip->chip_id == RTL8852A || chip->chip_id == RTL8852B) + val &= ~B_AX_TX_PARTIAL_MODE; rtw89_write32(rtwdev, R_AX_SEC_ENG_CTRL, val); /* init MIC ICV append */ @@ -1643,6 +1645,10 @@ static int sec_eng_init(struct rtw89_dev *rtwdev) /* option init */ rtw89_write32(rtwdev, R_AX_SEC_MPDU_PROC, val); + if (chip->chip_id == RTL8852C) + rtw89_write32_mask(rtwdev, R_AX_SEC_DEBUG1, + B_AX_TX_TIMEOUT_SEL_MASK, AX_TX_TO_VAL); + return 0; } diff --git a/drivers/net/wireless/realtek/rtw89/reg.h b/drivers/net/wireless/realtek/rtw89/reg.h index 1f4cf30..3505c9dd 100644 --- a/drivers/net/wireless/realtek/rtw89/reg.h +++ b/drivers/net/wireless/realtek/rtw89/reg.h @@ -799,6 +799,9 @@ #define R_AX_SEC_CAM_RDATA 0x9D14 #define R_AX_SEC_CAM_WDATA 0x9D18 #define R_AX_SEC_DEBUG 0x9D1C +#define R_AX_SEC_DEBUG1 0x9D1C +#define B_AX_TX_TIMEOUT_SEL_MASK GENMASK(31, 30) +#define AX_TX_TO_VAL 0x2 #define R_AX_SEC_TX_DEBUG 0x9D20 #define R_AX_SEC_RX_DEBUG 0x9D24 #define R_AX_SEC_TRX_PKT_CNT 0x9D28 -- 2.7.4