From b5ed7a5c1fdb3981713f7b637b72aa390c3db036 Mon Sep 17 00:00:00 2001 From: Robert Marko Date: Fri, 11 Aug 2023 13:01:16 +0200 Subject: [PATCH] ARM: dts: qcom: ipq4019: correct SDHCI XO clock Using GCC_DCD_XO_CLK as the XO clock for SDHCI controller is not correct, it seems that I somehow made a mistake of passing it instead of the fixed XO clock. Fixes: 04b3b72b5b8f ("ARM: dts: qcom: ipq4019: Add SDHCI controller node") Signed-off-by: Robert Marko Reviewed-by: Konrad Dybcio Link: https://lore.kernel.org/r/20230811110150.229966-1-robert.marko@sartura.hr Signed-off-by: Bjorn Andersson --- arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi index 1e06f76a..9844e0b 100644 --- a/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi @@ -230,9 +230,12 @@ interrupts = , ; interrupt-names = "hc_irq", "pwr_irq"; bus-width = <8>; - clocks = <&gcc GCC_SDCC1_AHB_CLK>, <&gcc GCC_SDCC1_APPS_CLK>, - <&gcc GCC_DCD_XO_CLK>; - clock-names = "iface", "core", "xo"; + clocks = <&gcc GCC_SDCC1_AHB_CLK>, + <&gcc GCC_SDCC1_APPS_CLK>, + <&xo>; + clock-names = "iface", + "core", + "xo"; status = "disabled"; }; -- 2.7.4