From b5baf569f77e1f172061642d4d8593e1ea737add Mon Sep 17 00:00:00 2001 From: Peter Bergner Date: Tue, 15 Mar 2022 08:46:47 -0500 Subject: [PATCH] rs6000: Fix invalid address passed to __builtin_mma_disassemble_acc [PR104923] The mma_disassemble_output_operand predicate is too lenient on the types of addresses it will accept, leading to combine creating invalid address that eventually lead to ICEs in LRA. The solution is to restrict the addresses to indirect, indexed or those valid for quad memory accesses. 2022-03-15 Peter Bergner gcc/ PR target/104923 * config/rs6000/predicates.md (mma_disassemble_output_operand): Restrict acceptable MEM addresses. gcc/testsuite/ PR target/104923 * gcc.target/powerpc/pr104923.c: New test. --- gcc/config/rs6000/predicates.md | 9 +++++++-- gcc/testsuite/gcc.target/powerpc/pr104923.c | 21 +++++++++++++++++++++ 2 files changed, 28 insertions(+), 2 deletions(-) create mode 100644 gcc/testsuite/gcc.target/powerpc/pr104923.c diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md index 566b85b..b1fcc69 100644 --- a/gcc/config/rs6000/predicates.md +++ b/gcc/config/rs6000/predicates.md @@ -1277,10 +1277,15 @@ (define_predicate "mma_disassemble_output_operand" (match_code "reg,subreg,mem") { + if (MEM_P (op)) + { + rtx addr = XEXP (op, 0); + return indexed_or_indirect_address (addr, mode) + || quad_address_p (addr, mode, false); + } + if (SUBREG_P (op)) op = SUBREG_REG (op); - if (!REG_P (op)) - return true; return vsx_register_operand (op, mode); }) diff --git a/gcc/testsuite/gcc.target/powerpc/pr104923.c b/gcc/testsuite/gcc.target/powerpc/pr104923.c new file mode 100644 index 0000000..f119824 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr104923.c @@ -0,0 +1,21 @@ +/* PR target/104923 */ +/* { dg-require-effective-target power10_ok } */ +/* { dg-options "-O2 -mdejagnu-cpu=power10" } */ + +/* Make sure we do not ICE on the following test cases. */ + +void +foo (__vector char *dst, __vector_quad *acc, unsigned int n) +{ + __vector char a[4]; + __builtin_mma_disassemble_acc(a, acc); + dst[2 * n] = a[0]; +} + +void +bar (__vector char *dst, __vector_quad *acc, unsigned int n) +{ + __vector char a[4]; + __builtin_mma_disassemble_acc(a, acc); + dst[3 * n] = a[0]; +} -- 2.7.4