From b547a2f38cfab81f6cbe392b9eb48ab0c12b80cf Mon Sep 17 00:00:00 2001
From: Yi Luo <luoyi@google.com>
Date: Thu, 21 Apr 2016 15:59:05 -0700
Subject: [PATCH] Add the 64-bit CPU cycle count utility function

Change-Id: Ie87245bbdf5735bc9729199eeb07899d81dbf267
---
 vpx_ports/x86.h | 25 ++++++++++++++++++++++++-
 1 file changed, 24 insertions(+), 1 deletion(-)

diff --git a/vpx_ports/x86.h b/vpx_ports/x86.h
index 5da346e..e3ebc53 100644
--- a/vpx_ports/x86.h
+++ b/vpx_ports/x86.h
@@ -216,6 +216,11 @@ x86_simd_caps(void) {
 unsigned __int64 __rdtsc(void);
 #pragma intrinsic(__rdtsc)
 #endif
+// Note:
+//  32-bit CPU cycle counter is light-weighted for most function performance
+//  measurement. For large function (CPU time > a couple of seconds), 64-bit
+//  counter should be used.
+// 32-bit CPU cycle counter
 static INLINE unsigned int
 x86_readtsc(void) {
 #if defined(__GNUC__) && __GNUC__
@@ -234,7 +239,25 @@ x86_readtsc(void) {
 #endif
 #endif
 }
-
+// 64-bit CPU cycle counter
+static INLINE uint64_t
+x86_readtsc64(void) {
+#if defined(__GNUC__) && __GNUC__
+  uint32_t hi, lo;
+  __asm__ __volatile__("rdtsc" : "=a"(lo), "=d"(hi));
+  return ((uint64_t)hi << 32) | lo;
+#elif defined(__SUNPRO_C) || defined(__SUNPRO_CC)
+  uint_t hi, lo;
+  asm volatile("rdtsc\n\t" : "=a"(lo), "=d"(hi));
+  return ((uint64_t)hi << 32) | lo;
+#else
+#if ARCH_X86_64
+  return (uint64_t)__rdtsc();
+#else
+  __asm  rdtsc;
+#endif
+#endif
+}
 
 #if defined(__GNUC__) && __GNUC__
 #define x86_pause_hint()\
-- 
2.7.4