From b4af107239789499d182deb5111ae3008c09dcb3 Mon Sep 17 00:00:00 2001 From: Ahmed Bougacha Date: Wed, 27 Apr 2016 20:32:54 +0000 Subject: [PATCH] [ARM] Set correct successors in CMPXCHG pseudo expansion. transferSuccessors() would LoadCmpBB a successor of DoneBB, whereas it should be a successor of the original MBB. The testcase changes are caused by Thumb2SizeReduction, which was previously confused by the broken CFG. Follow-up to r266679. Unfortunately, it's tricky to catch this in the verifier. llvm-svn: 267778 --- llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp | 6 ++++-- llvm/test/CodeGen/ARM/cmpxchg-O0.ll | 6 +++--- 2 files changed, 7 insertions(+), 5 deletions(-) diff --git a/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp b/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp index aefa20b..1be3724 100644 --- a/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp +++ b/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp @@ -801,7 +801,6 @@ bool ARMExpandPseudo::ExpandCMP_SWAP(MachineBasicBlock &MBB, // ldrex rDest, [rAddr] // cmp rDest, rDesired // bne .Ldone - MBB.addSuccessor(LoadCmpBB); LoadCmpBB->addLiveIn(Addr.getReg()); LoadCmpBB->addLiveIn(Dest.getReg()); LoadCmpBB->addLiveIn(Desired.getReg()); @@ -857,6 +856,8 @@ bool ARMExpandPseudo::ExpandCMP_SWAP(MachineBasicBlock &MBB, DoneBB->transferSuccessors(&MBB); addPostLoopLiveIns(DoneBB, LiveRegs); + MBB.addSuccessor(LoadCmpBB); + NextMBBI = MBB.end(); MI.eraseFromParent(); return true; @@ -914,7 +915,6 @@ bool ARMExpandPseudo::ExpandCMP_SWAP_64(MachineBasicBlock &MBB, // cmp rDestLo, rDesiredLo // sbcs rStatus, rDestHi, rDesiredHi // bne .Ldone - MBB.addSuccessor(LoadCmpBB); LoadCmpBB->addLiveIn(Addr.getReg()); LoadCmpBB->addLiveIn(Dest.getReg()); LoadCmpBB->addLiveIn(Desired.getReg()); @@ -977,6 +977,8 @@ bool ARMExpandPseudo::ExpandCMP_SWAP_64(MachineBasicBlock &MBB, DoneBB->transferSuccessors(&MBB); addPostLoopLiveIns(DoneBB, LiveRegs); + MBB.addSuccessor(LoadCmpBB); + NextMBBI = MBB.end(); MI.eraseFromParent(); return true; diff --git a/llvm/test/CodeGen/ARM/cmpxchg-O0.ll b/llvm/test/CodeGen/ARM/cmpxchg-O0.ll index c29050e..8a8ad66 100644 --- a/llvm/test/CodeGen/ARM/cmpxchg-O0.ll +++ b/llvm/test/CodeGen/ARM/cmpxchg-O0.ll @@ -18,7 +18,7 @@ define { i8, i1 } @test_cmpxchg_8(i8* %addr, i8 %desired, i8 %new) nounwind { ; CHECK: bne [[RETRY]] ; CHECK: [[DONE]]: ; CHECK: cmp{{(\.w)?}} [[OLD]], [[DESIRED]] -; CHECK: {{moveq.w|movweq}} {{r[0-9]+}}, #1 +; CHECK: {{moveq|movweq}} {{r[0-9]+}}, #1 ; CHECK: dmb ish %res = cmpxchg i8* %addr, i8 %desired, i8 %new seq_cst monotonic ret { i8, i1 } %res @@ -37,7 +37,7 @@ define { i16, i1 } @test_cmpxchg_16(i16* %addr, i16 %desired, i16 %new) nounwind ; CHECK: bne [[RETRY]] ; CHECK: [[DONE]]: ; CHECK: cmp{{(\.w)?}} [[OLD]], [[DESIRED]] -; CHECK: {{moveq.w|movweq}} {{r[0-9]+}}, #1 +; CHECK: {{moveq|movweq}} {{r[0-9]+}}, #1 ; CHECK: dmb ish %res = cmpxchg i16* %addr, i16 %desired, i16 %new seq_cst monotonic ret { i16, i1 } %res @@ -56,7 +56,7 @@ define { i32, i1 } @test_cmpxchg_32(i32* %addr, i32 %desired, i32 %new) nounwind ; CHECK: bne [[RETRY]] ; CHECK: [[DONE]]: ; CHECK: cmp{{(\.w)?}} [[OLD]], [[DESIRED]] -; CHECK: {{moveq.w|movweq}} {{r[0-9]+}}, #1 +; CHECK: {{moveq|movweq}} {{r[0-9]+}}, #1 ; CHECK: dmb ish %res = cmpxchg i32* %addr, i32 %desired, i32 %new seq_cst monotonic ret { i32, i1 } %res -- 2.7.4