From b448a266cc4a2a960a65108a4a36d36c17cd74b2 Mon Sep 17 00:00:00 2001 From: Timur Tabi Date: Tue, 9 Jun 2020 07:52:04 -0500 Subject: [PATCH] drm/nouveau/nvfw: firmware structures should begin with nvfw_ Rename all structures that are used directly by firmware to have a nvfw_ prefix. This makes it easier to identify structures that have a fixed, specific layout. A future patch will define several more such structures, so it's important to be consistent now. Signed-off-by: Timur Tabi Signed-off-by: Ben Skeggs --- drivers/gpu/drm/nouveau/include/nvfw/pmu.h | 6 +++--- drivers/gpu/drm/nouveau/include/nvfw/sec2.h | 6 +++--- drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h | 10 +++++----- drivers/gpu/drm/nouveau/nvkm/engine/sec2/gp102.c | 2 +- drivers/gpu/drm/nouveau/nvkm/falcon/cmdq.c | 6 +++--- drivers/gpu/drm/nouveau/nvkm/falcon/msgq.c | 8 ++++---- drivers/gpu/drm/nouveau/nvkm/falcon/qmgr.h | 2 +- drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm20b.c | 4 ++-- drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp10b.c | 2 +- 9 files changed, 23 insertions(+), 23 deletions(-) diff --git a/drivers/gpu/drm/nouveau/include/nvfw/pmu.h b/drivers/gpu/drm/nouveau/include/nvfw/pmu.h index 452ed7d..64a51e7c 100644 --- a/drivers/gpu/drm/nouveau/include/nvfw/pmu.h +++ b/drivers/gpu/drm/nouveau/include/nvfw/pmu.h @@ -25,7 +25,7 @@ struct nv_pmu_args { #define NV_PMU_UNIT_ACR 0x0a struct nv_pmu_init_msg { - struct nv_falcon_msg hdr; + struct nvfw_falcon_msg hdr; #define NV_PMU_INIT_MSG_INIT 0x00 u8 msg_type; @@ -44,7 +44,7 @@ struct nv_pmu_init_msg { }; struct nv_pmu_acr_cmd { - struct nv_falcon_cmd hdr; + struct nvfw_falcon_cmd hdr; #define NV_PMU_ACR_CMD_INIT_WPR_REGION 0x00 #define NV_PMU_ACR_CMD_BOOTSTRAP_FALCON 0x01 #define NV_PMU_ACR_CMD_BOOTSTRAP_MULTIPLE_FALCONS 0x03 @@ -52,7 +52,7 @@ struct nv_pmu_acr_cmd { }; struct nv_pmu_acr_msg { - struct nv_falcon_cmd hdr; + struct nvfw_falcon_cmd hdr; u8 msg_type; }; diff --git a/drivers/gpu/drm/nouveau/include/nvfw/sec2.h b/drivers/gpu/drm/nouveau/include/nvfw/sec2.h index 0349655..9a37ad4 100644 --- a/drivers/gpu/drm/nouveau/include/nvfw/sec2.h +++ b/drivers/gpu/drm/nouveau/include/nvfw/sec2.h @@ -13,7 +13,7 @@ struct nv_sec2_args { #define NV_SEC2_UNIT_ACR 0x08 struct nv_sec2_init_msg { - struct nv_falcon_msg hdr; + struct nvfw_falcon_msg hdr; #define NV_SEC2_INIT_MSG_INIT 0x00 u8 msg_type; @@ -34,13 +34,13 @@ struct nv_sec2_init_msg { }; struct nv_sec2_acr_cmd { - struct nv_falcon_cmd hdr; + struct nvfw_falcon_cmd hdr; #define NV_SEC2_ACR_CMD_BOOTSTRAP_FALCON 0x00 u8 cmd_type; }; struct nv_sec2_acr_msg { - struct nv_falcon_cmd hdr; + struct nvfw_falcon_cmd hdr; u8 msg_type; }; diff --git a/drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h b/drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h index daa8e4b..3981cb1 100644 --- a/drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h @@ -31,21 +31,21 @@ int gp102_sec2_flcn_enable(struct nvkm_falcon *); #define FLCN_ERR(f,fmt,a...) FLCN_PRINTK(error, (f), fmt, ##a) /** - * struct nv_falcon_msg - header for all messages + * struct nvfw_falcon_msg - header for all messages * * @unit_id: id of firmware process that sent the message * @size: total size of message * @ctrl_flags: control flags * @seq_id: used to match a message from its corresponding command */ -struct nv_falcon_msg { +struct nvfw_falcon_msg { u8 unit_id; u8 size; u8 ctrl_flags; u8 seq_id; }; -#define nv_falcon_cmd nv_falcon_msg +#define nvfw_falcon_cmd nvfw_falcon_msg #define NV_FALCON_CMD_UNIT_ID_REWIND 0x00 struct nvkm_falcon_qmgr; @@ -53,7 +53,7 @@ int nvkm_falcon_qmgr_new(struct nvkm_falcon *, struct nvkm_falcon_qmgr **); void nvkm_falcon_qmgr_del(struct nvkm_falcon_qmgr **); typedef int -(*nvkm_falcon_qmgr_callback)(void *priv, struct nv_falcon_msg *); +(*nvkm_falcon_qmgr_callback)(void *priv, struct nvfw_falcon_msg *); struct nvkm_falcon_cmdq; int nvkm_falcon_cmdq_new(struct nvkm_falcon_qmgr *, const char *name, @@ -62,7 +62,7 @@ void nvkm_falcon_cmdq_del(struct nvkm_falcon_cmdq **); void nvkm_falcon_cmdq_init(struct nvkm_falcon_cmdq *, u32 index, u32 offset, u32 size); void nvkm_falcon_cmdq_fini(struct nvkm_falcon_cmdq *); -int nvkm_falcon_cmdq_send(struct nvkm_falcon_cmdq *, struct nv_falcon_cmd *, +int nvkm_falcon_cmdq_send(struct nvkm_falcon_cmdq *, struct nvfw_falcon_cmd *, nvkm_falcon_qmgr_callback, void *priv, unsigned long timeout_jiffies); diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/sec2/gp102.c b/drivers/gpu/drm/nouveau/nvkm/engine/sec2/gp102.c index 368f2a0..a2a9a84 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/sec2/gp102.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/sec2/gp102.c @@ -29,7 +29,7 @@ #include static int -gp102_sec2_acr_bootstrap_falcon_callback(void *priv, struct nv_falcon_msg *hdr) +gp102_sec2_acr_bootstrap_falcon_callback(void *priv, struct nvfw_falcon_msg *hdr) { struct nv_sec2_acr_bootstrap_falcon_msg *msg = container_of(hdr, typeof(*msg), msg.hdr); diff --git a/drivers/gpu/drm/nouveau/nvkm/falcon/cmdq.c b/drivers/gpu/drm/nouveau/nvkm/falcon/cmdq.c index 40e3f3f..44cf6a8 100644 --- a/drivers/gpu/drm/nouveau/nvkm/falcon/cmdq.c +++ b/drivers/gpu/drm/nouveau/nvkm/falcon/cmdq.c @@ -58,7 +58,7 @@ nvkm_falcon_cmdq_push(struct nvkm_falcon_cmdq *cmdq, void *data, u32 size) static void nvkm_falcon_cmdq_rewind(struct nvkm_falcon_cmdq *cmdq) { - struct nv_falcon_cmd cmd; + struct nvfw_falcon_cmd cmd; cmd.unit_id = NV_FALCON_CMD_UNIT_ID_REWIND; cmd.size = sizeof(cmd); @@ -97,7 +97,7 @@ nvkm_falcon_cmdq_close(struct nvkm_falcon_cmdq *cmdq) } static int -nvkm_falcon_cmdq_write(struct nvkm_falcon_cmdq *cmdq, struct nv_falcon_cmd *cmd) +nvkm_falcon_cmdq_write(struct nvkm_falcon_cmdq *cmdq, struct nvfw_falcon_cmd *cmd) { static unsigned timeout = 2000; unsigned long end_jiffies = jiffies + msecs_to_jiffies(timeout); @@ -121,7 +121,7 @@ nvkm_falcon_cmdq_write(struct nvkm_falcon_cmdq *cmdq, struct nv_falcon_cmd *cmd) #define CMD_FLAGS_INTR BIT(1) int -nvkm_falcon_cmdq_send(struct nvkm_falcon_cmdq *cmdq, struct nv_falcon_cmd *cmd, +nvkm_falcon_cmdq_send(struct nvkm_falcon_cmdq *cmdq, struct nvfw_falcon_cmd *cmd, nvkm_falcon_qmgr_callback cb, void *priv, unsigned long timeout) { diff --git a/drivers/gpu/drm/nouveau/nvkm/falcon/msgq.c b/drivers/gpu/drm/nouveau/nvkm/falcon/msgq.c index cbfe09a..e74371d 100644 --- a/drivers/gpu/drm/nouveau/nvkm/falcon/msgq.c +++ b/drivers/gpu/drm/nouveau/nvkm/falcon/msgq.c @@ -74,7 +74,7 @@ nvkm_falcon_msgq_pop(struct nvkm_falcon_msgq *msgq, void *data, u32 size) } static int -nvkm_falcon_msgq_read(struct nvkm_falcon_msgq *msgq, struct nv_falcon_msg *hdr) +nvkm_falcon_msgq_read(struct nvkm_falcon_msgq *msgq, struct nvfw_falcon_msg *hdr) { int ret = 0; @@ -112,7 +112,7 @@ close: } static int -nvkm_falcon_msgq_exec(struct nvkm_falcon_msgq *msgq, struct nv_falcon_msg *hdr) +nvkm_falcon_msgq_exec(struct nvkm_falcon_msgq *msgq, struct nvfw_falcon_msg *hdr) { struct nvkm_falcon_qmgr_seq *seq; @@ -144,7 +144,7 @@ nvkm_falcon_msgq_recv(struct nvkm_falcon_msgq *msgq) * stack space to work with. */ u8 msg_buffer[MSG_BUF_SIZE]; - struct nv_falcon_msg *hdr = (void *)msg_buffer; + struct nvfw_falcon_msg *hdr = (void *)msg_buffer; while (nvkm_falcon_msgq_read(msgq, hdr) > 0) nvkm_falcon_msgq_exec(msgq, hdr); @@ -155,7 +155,7 @@ nvkm_falcon_msgq_recv_initmsg(struct nvkm_falcon_msgq *msgq, void *data, u32 size) { struct nvkm_falcon *falcon = msgq->qmgr->falcon; - struct nv_falcon_msg *hdr = data; + struct nvfw_falcon_msg *hdr = data; int ret; msgq->head_reg = falcon->func->msgq.head; diff --git a/drivers/gpu/drm/nouveau/nvkm/falcon/qmgr.h b/drivers/gpu/drm/nouveau/nvkm/falcon/qmgr.h index a45cd70..976cb7b 100644 --- a/drivers/gpu/drm/nouveau/nvkm/falcon/qmgr.h +++ b/drivers/gpu/drm/nouveau/nvkm/falcon/qmgr.h @@ -3,7 +3,7 @@ #define __NVKM_FALCON_QMGR_H__ #include -#define HDR_SIZE sizeof(struct nv_falcon_msg) +#define HDR_SIZE sizeof(struct nvfw_falcon_msg) #define QUEUE_ALIGNMENT 4 /* max size of the messages we can receive */ #define MSG_BUF_SIZE 128 diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm20b.c b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm20b.c index 8257103..3a0cca3 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm20b.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm20b.c @@ -28,7 +28,7 @@ #include static int -gm20b_pmu_acr_bootstrap_falcon_cb(void *priv, struct nv_falcon_msg *hdr) +gm20b_pmu_acr_bootstrap_falcon_cb(void *priv, struct nvfw_falcon_msg *hdr) { struct nv_pmu_acr_bootstrap_falcon_msg *msg = container_of(hdr, typeof(*msg), msg.hdr); @@ -130,7 +130,7 @@ gm20b_pmu_acr = { }; static int -gm20b_pmu_acr_init_wpr_callback(void *priv, struct nv_falcon_msg *hdr) +gm20b_pmu_acr_init_wpr_callback(void *priv, struct nvfw_falcon_msg *hdr) { struct nv_pmu_acr_init_wpr_region_msg *msg = container_of(hdr, typeof(*msg), msg.hdr); diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp10b.c b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp10b.c index 5b81c73..fdfb147 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp10b.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp10b.c @@ -28,7 +28,7 @@ static int gp10b_pmu_acr_bootstrap_multiple_falcons_cb(void *priv, - struct nv_falcon_msg *hdr) + struct nvfw_falcon_msg *hdr) { struct nv_pmu_acr_bootstrap_multiple_falcons_msg *msg = container_of(hdr, typeof(*msg), msg.hdr); -- 2.7.4